- Boards
- STMicroelectronics
- STM32U3C5ZI-Q
STM32U3C5ZI-Q
New First seen 10 Sep 2026, last seen 16 Oct 2026. 3 units live.
Evaluations
2
2 attempts, 0 cancelled
Completion
100.0%
of 2 attempts
Complete out of complete and incomplete attempts. Cancelled attempts are listed, never counted.
Evaluated pass rate
100.0%
of 2 evaluations with a verdict
Final attempts that passed, out of pass and code. Lab 0, cancelled 0 and unclassified 0 are shown, never folded in.
Failed after retries
0 of 2
0 failed first time, 0 passed on retry
Changes with a failed boot on this board
0 of 0
Allow-CI+2 for TF-A; linked TF-M runs. 0 with no boot verdict. Linked to a change: 0.0% of 2 evaluations
Last 30 days
Evaluations per day, stacked by final outcome. Hatched means the lab, solid means the code.
- Pass
- Passed on retry
- Lab
- Code
- Cancelled
- Unclassified
History by month
Before the live window we know whether each attempt completed and how retries ended, not why it failed or which change it was. Shaded bands are months with no data held.
All gaps
- No data held: 28 Feb 2026 to 28 Feb 2026
- Evaluations per month
- Incomplete attempts
- Failed after retries
Units
CI attempts per physical unit, retries included. Passing on another unit can help identify a unit fault. Health checks are fleet health.
| stm32u3c5zi-q-01 | 1 | 0 | 0 | 0 | Complete 15 Oct 12:44 |
| stm32u3c5zi-q-02 | 0 | 0 | 0 | 0 | Complete 15 Oct 10:13 |
| stm32u3c5zi-q-03 | 1 | 0 | 0 | 0 | Complete 15 Oct 10:16 |
Evaluations
One row per builder build on this board, newest first, with every attempt. CI runs only; 1 of 1 shown.
| Attempts | |||||
|---|---|---|---|---|---|
| 16 Oct 04:39 | tf-m-build-config 683700 | not recorded | main built refs/heads/main | Pass |
Fleet health
Health checks, not CI results. They never count towards any rate on this page.
No health check ran on this board in the last 7 days.
Incidents
-
Lab
17 Sep 2026 to 18 Sep 2026
LAVA logger DNS failures