TF test results
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Data as of 28 Oct 2026, 13:02 UTC

Last LAVA sync
28 Oct 2026, 13:02 UTC
Last Jenkins sync
28 Oct 2026, 13:03 UTC
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About the data

LAVA job 3043520

PassJunounit laa-00134-juno-r0-05ended 14 Oct 02:25

tf-juno

Outcome
Pass
Boot
booted
LAVA health
Complete
Job name
tf-juno
Submitter
ciadmin_arm
Started
14 Oct 02:19
Duration
5.4 min
Attempt
1 of the evaluation on tf-a-lts2.8-builder #226435

Results by suite

Only rows with the role assertion are tests. Actions are LAVA's own steps, wrappers repeat an interactive suite, and the job row carries LAVA's verdict.

lava 6 rows, 0 assertions: 6 pass
CaseRoleResultLevelDuration
Validate jobvalidate action pass
Download artefactshttp-download action pass 1.1.1.1 0.5 s
Power cycle (PDU)pdu-reboot action pass 1.1.3.1 15.5 s
Power cycle (PDU)pdu-reboot action pass 2.2.1 15.5 s
Power offpower-off action pass 4.1 0.2 s
LAVA job verdictjob job pass
tftf 120 rows, 120 assertions: 48 pass, 72 skip
CaseRoleResultLevelDuration
Repeated shutdown of all cores to stress test CPU on CPU suspend and CPU offrepeated_shutdown_of_all_cores_to_stress_test_cpu_on_cpu_suspend_and_cpu_off assertion pass 3.1
PSCI CPU on off stress testpsci_cpu_on_off_stress_test assertion pass 3.1
Repeated hotplug of all cores to stress test CPU on and CPU offrepeated_hotplug_of_all_cores_to_stress_test_cpu_on_and_cpu_off assertion pass 3.1
Random hotplug cores in a large iteration to stress boot path coderandom_hotplug_cores_in_a_large_iteration_to_stress_boot_path_code assertion pass 3.1
Hotplug a cluster in a large iteration to stress cluster on and off functionalityhotplug_a_cluster_in_a_large_iteration_to_stress_cluster_on_and_off_functionality assertion pass 3.1
NVM supportnvm_support assertion pass 3.1
NVM serialisationnvm_serialisation assertion pass 3.1
Events apievents_api assertion pass 3.1
IRQ handlingirq_handling assertion pass 3.1
Sgi supportsgi_support assertion pass 3.1
Verify the timer interrupt generationverify_the_timer_interrupt_generation assertion pass 3.1
Target timer to a power down CPUtarget_timer_to_a_power_down_cpu assertion pass 3.1
Test scenario where multiple CPUs call same timeouttest_scenario_where_multiple_cpus_call_same_timeout assertion pass 3.1
Cntfrq compare testcntfrq_compare_test assertion pass 3.1
Unknown SMCunknown_smc assertion pass 3.1
Query standard servicequery_standard_service assertion pass 3.1
PSCI versionpsci_version assertion pass 3.1
Affinity info level0 onaffinity_info_level0_on assertion pass 3.1
Affinity info level0 offaffinity_info_level0_off assertion pass 3.1
Affinity info level1 onaffinity_info_level1_on assertion pass 3.1
Affinity info level1 offaffinity_info_level1_off assertion pass 3.1
Affinity info level2affinity_info_level2 assertion pass 3.1
Affinity info level3affinity_info_level3 assertion skip 3.1
Affinity info level0 powerdownaffinity_info_level0_powerdown assertion pass 3.1
CPU hotplugcpu_hotplug assertion pass 3.1
CPU already oncpu_already_on assertion pass 3.1
Context id passingcontext_id_passing assertion pass 3.1
Invalid CPUinvalid_cpu assertion pass 3.1
Invalid entry pointinvalid_entry_point assertion pass 3.1
CPU suspend to powerdown at level 0cpu_suspend_to_powerdown_at_level_0 assertion pass 3.1
CPU suspend to powerdown at level 1cpu_suspend_to_powerdown_at_level_1 assertion pass 3.1
CPU suspend to powerdown at level 2cpu_suspend_to_powerdown_at_level_2 assertion pass 3.1
CPU suspend to powerdown at level 3cpu_suspend_to_powerdown_at_level_3 assertion skip 3.1
CPU suspend to standby at level 0cpu_suspend_to_standby_at_level_0 assertion pass 3.1
CPU suspend to standby at level 1cpu_suspend_to_standby_at_level_1 assertion pass 3.1
CPU suspend to standby at level 2cpu_suspend_to_standby_at_level_2 assertion pass 3.1
CPU suspend to standby at level 3cpu_suspend_to_standby_at_level_3 assertion skip 3.1
For valid composite state CPU suspendfor_valid_composite_state_cpu_suspend assertion pass 3.1
Stats test cases for CPU offstats_test_cases_for_cpu_off assertion pass 3.1
Tests for node hw statetests_for_node_hw_state assertion pass 3.1
Tests for node hw state on multiclustertests_for_node_hw_state_on_multicluster assertion pass 3.1
PSCI featurespsci_features assertion pass 3.1
PSCI invalid featurespsci_invalid_features assertion pass 3.1
PSCI migrate info typepsci_migrate_info_type assertion pass 3.1
PSCI mem protect checkpsci_mem_protect_check assertion pass 3.1
SDEI event handler state machine testingsdei_event_handler_state_machine_testing assertion skip 3.1
SDEI event handling on all cores in sequencesdei_event_handling_on_all_cores_in_sequence assertion skip 3.1
SDEI event handling on all cores in parallelsdei_event_handling_on_all_cores_in_parallel assertion skip 3.1
SDEI event signaling each core signals itselfsdei_event_signaling_each_core_signals_itself assertion skip 3.1
SDEI event signaling one core signals all otherssdei_event_signaling_one_core_signals_all_others assertion skip 3.1
SDEI event routing all spi events routed to all CPUssdei_event_routing_all_spi_events_routed_to_all_cpus assertion skip 3.1
SDEI event handler pstate testingsdei_event_handler_pstate_testing assertion skip 3.1
Suspend to deepest power level on all cores in parallelsuspend_to_deepest_power_level_on_all_cores_in_parallel assertion skip 3.1
Suspend to deepest power level on all cores in sequencesuspend_to_deepest_power_level_on_all_cores_in_sequence assertion skip 3.1
CPU suspend on all cores in parallelcpu_suspend_on_all_cores_in_parallel assertion skip 3.1
CPU suspend on all cores in sequencecpu_suspend_on_all_cores_in_sequence assertion skip 3.1
CPU off on all non lead cores in sequence and suspend lead to deepest power levelcpu_off_on_all_non_lead_cores_in_sequence_and_suspend_lead_to_deepest_power_level assertion skip 3.1
PSCI version call on all cores in parallelpsci_version_call_on_all_cores_in_parallel assertion skip 3.1
TSP preempt by IRQ and resumetsp_preempt_by_irq_and_resume assertion skip 3.1
Fast SMC while TSP preemptedfast_smc_while_tsp_preempted assertion skip 3.1
Std SMC resumption while TSP preemptedstd_smc_resumption_while_tsp_preempted assertion skip 3.1
Std SMC abortion while TSP preemptedstd_smc_abortion_while_tsp_preempted assertion skip 3.1
Resume SMC without TSP preemptionresume_smc_without_tsp_preemption assertion skip 3.1
Stress TSP preemption and resumptionstress_tsp_preemption_and_resumption assertion skip 3.1
Test secure FIQ while TSP is preemptedtest_secure_fiq_while_tsp_is_preempted assertion skip 3.1
Resume preempted std SMCresume_preempted_std_smc assertion skip 3.1
Resume preempted std SMC from other CPUsresume_preempted_std_smc_from_other_cpus assertion skip 3.1
Resume std SMC from different CPUsresume_std_smc_from_different_cpus assertion skip 3.1
Resume preempted std SMC after PSCI CPU off on cycleresume_preempted_std_smc_after_psci_cpu_off_on_cycle assertion skip 3.1
Multicore spurious interrupt testmulticore_spurious_interrupt_test assertion skip 3.1
Testsecurepayload standard functions service calltestsecurepayload_standard_functions_service_call assertion skip 3.1
Stress test TSP functionalitystress_test_tsp_functionality assertion skip 3.1
Test pstate bits maintained on exceptiontest_pstate_bits_maintained_on_exception assertion skip 3.1
Create all power states and validate EL3 power state parsingcreate_all_power_states_and_validate_el3_power_state_parsing assertion skip 3.1
Create only local power state and validate EL3 power state parsingcreate_only_local_power_state_and_validate_el3_power_state_parsing assertion skip 3.1
Create invalid local power state at all levels and validate EL3 power state parsingcreate_invalid_local_power_state_at_all_levels_and_validate_el3_power_state_parsing assertion skip 3.1
Create invalid power state type and validate EL3 power state parsingcreate_invalid_power_state_type_and_validate_el3_power_state_parsing assertion skip 3.1
Create invalid power level and validate EL3 power state parsing for original state formatcreate_invalid_power_level_and_validate_el3_power_state_parsing_for_original_state_format assertion skip 3.1
Create a power state with valid and invalid local state id at different levels and validate power state parsingcreate_a_power_state_with_valid_and_invalid_local_state_id_at_different_levels_and_validate_power_state_parsing assertion skip 3.1
System reset before state switchsystem_reset_before_state_switch assertion skip 3.1
Request state switch with invalid pcrequest_state_switch_with_invalid_pc assertion skip 3.1
Request state switch with invalid contextrequest_state_switch_with_invalid_context assertion skip 3.1
Request a valid state switchrequest_a_valid_state_switch assertion skip 3.1
Request a valid state switch after CPU onrequest_a_valid_state_switch_after_cpu_on assertion skip 3.1
Amuv1 valid counter valuesamuv1_valid_counter_values assertion skip 3.1
Amuv1 suspend resumeamuv1_suspend_resume assertion skip 3.1
SVE supportsve_support assertion skip 3.1
Access pointer authentication registersaccess_pointer_authentication_registers assertion skip 3.1
Use pointer authentication instructionsuse_pointer_authentication_instructions assertion skip 3.1
Check for pointer authentication key leakage from EL3check_for_pointer_authentication_key_leakage_from_el3 assertion skip 3.1
Check for pointer authentication key leakage from TSPcheck_for_pointer_authentication_key_leakage_from_tsp assertion skip 3.1
Use mte instructionsuse_mte_instructions assertion skip 3.1
Check for mte register leakagecheck_for_mte_register_leakage assertion skip 3.1
Use fgt registersuse_fgt_registers assertion skip 3.1
Use ecv registersuse_ecv_registers assertion skip 3.1
Use trace buffer control registersuse_trace_buffer_control_registers assertion skip 3.1
Use branch record buffer control registersuse_branch_record_buffer_control_registers assertion skip 3.1
Use trace filter control registersuse_trace_filter_control_registers assertion skip 3.1
Use trace system registersuse_trace_system_registers assertion skip 3.1
SME supportsme_support assertion skip 3.1
Spe supportspe_support assertion skip 3.1
Afp supportafp_support assertion skip 3.1
Test wfit instructiontest_wfit_instruction assertion skip 3.1
Test wfet instructiontest_wfet_instruction assertion skip 3.1
Smccc arch workaround 1 testsmccc_arch_workaround_1_test assertion skip 3.1
Smccc arch workaround 2 testsmccc_arch_workaround_2_test assertion skip 3.1
Smccc arch workaround 3 testsmccc_arch_workaround_3_test assertion skip 3.1
Smccc arch workaround 4 testsmccc_arch_workaround_4_test assertion skip 3.1
Smccc arch soc id testsmccc_arch_soc_id_test assertion skip 3.1
Smccc arch workaround 1 latencysmccc_arch_workaround_1_latency assertion skip 3.1
Test cluster power up latencytest_cluster_power_up_latency assertion pass 3.1
Fast smc32fast_smc32 assertion pass 3.1
Fast smc64fast_smc64 assertion pass 3.1
Yielding smc32yielding_smc32 assertion pass 3.1
Yielding smc64yielding_smc64 assertion pass 3.1
Leak PMU pc write retired counter values from EL3 on PSCI suspend SMCleak_pmu_pc_write_retired_counter_values_from_el3_on_psci_suspend_smc assertion skip 3.1
Leak PMU cycle counter values from EL3 on PSCI suspend SMCleak_pmu_cycle_counter_values_from_el3_on_psci_suspend_smc assertion skip 3.1
Leak PMU pc write retired counter values from s EL1 on fast SMC addleak_pmu_pc_write_retired_counter_values_from_s_el1_on_fast_smc_add assertion skip 3.1
Leak PMU cycle counter values from s EL1 on fast SMC addleak_pmu_cycle_counter_values_from_s_el1_on_fast_smc_add assertion skip 3.1
Stress test the timer frameworkstress_test_the_timer_framework assertion pass 3.1