TF test results
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Data as of 29 Oct 2026, 12:21 UTC

Last LAVA sync
29 Oct 2026, 12:21 UTC
Last Jenkins sync
29 Oct 2026, 12:23 UTC
Last S3 export sync
7 Oct 2026, 09:53 UTC
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About the data
Runs: Branch and nightly runs Clear filters

Board test coverage

Which boards in TF CI were seen testing which firmware branch, and with what result. Test results for the last 30 days; older history is at job level only.

Fleet health checks

18 board types, 58 devices live. 1 retired since Oct 2024: Juno-R2.

TF-A

Scroll the matrix sideways to see every branch.

TF-A boards by branch and suite, last 30 days, branch and nightly.
Board and suitemasterLTS 2.14LTS 2.12LTS 2.10LTS 2.8integrationUnattributed
Arm
juno 22 observed devices, Boot, 14.4 checks
lava 99%496n=496 with verdict100%297n=297 with verdict100%320n=320 with verdict100%322n=322 with verdict100%320n=320 with verdict1/11n=1 with verdictdeclared until Oct 2026
0_shutdown, shutdown 100%84n=84 with verdict100%50n=50 with verdict100%54n=54 with verdict100%54n=54 with verdict100%54n=54 with verdictdeclared until Oct 2026declared until Oct 2026
TFTF, tftf 100%958n=958 with verdict100%600n=600 with verdict99%634n=634 with verdict100%637n=633 with verdict100%637n=634 with verdictdeclared until Oct 2026declared until Oct 2026
0_tftf-boot-banner, 0_tftf-exit, 0_tftf-mem-protect-case, 0_tftf-mem-protect-sentinel, 0_tftf-power-cycle-0, 0_tftf-power-cycle-1, 0_tftf-resume-after-mem-protect, 0_tftf-resume-after-warm-reset, 0_tftf-tests-crashed-zero, 0_tftf-tests-failed-zero, 0_tftf-tests-passed, 0_tftf-warm-reset-case, 0_tftf-warm-reset-sentinel-modified, tftf-boot-banner, tftf-exit, tftf-mem-protect-case, tftf-mem-protect-sentinel, tftf-power-cycle-0, tftf-power-cycle-1, tftf-resume-after-mem-protect, tftf-resume-after-warm-reset, tftf-tests-crashed-zero, tftf-tests-failed-zero, tftf-tests-passed, tftf-warm-reset-case, tftf-warm-reset-sentinel-modified 100%161n=161 with verdict100%100n=100 with verdict100%107n=107 with verdict100%108n=108 with verdict100%107n=107 with verdictdeclared until Oct 2026declared until Oct 2026
n1sdp 2 observed devices, Boot
int_1, lava 100%41n=41 with verdict100%25n=25 with verdict100%27n=27 with verdict100%27n=27 with verdict100%27n=27 with verdictdeclared until Oct 2026declared until Oct 2026
TFTF, tftf 100%51n=51 with verdict100%25n=25 with verdict100%26n=26 with verdictno verdict1n=0 with verdict··declared until Oct 2026
Chromebook
mt8192-asurada-rev1 3 observed devices, Boot
int_1, int_2, lava 100%41n=41 with verdict100%25n=25 with verdict100%27n=27 with verdict100%27n=27 with verdict100%27n=27 with verdictdeclared until Oct 2026declared until Oct 2026
mt8195-cherry-tomato-r2 3 observed devices, Boot
int_1, int_2, lava 100%41n=41 with verdict100%25n=25 with verdict100%27n=27 with verdict100%27n=27 with verdict1/11n=1 with verdictdeclared until Oct 2026declared until Oct 2026
mt8186-corsola-tentacruel 3 observed devices, Boot
int_1, int_2, lava 100%40n=40 with verdict100%25n=25 with verdict100%27n=27 with verdict100%27n=27 with verdict1/11n=1 with verdictdeclared until Oct 2026declared until Oct 2026
mt8188-geralt 3 observed devices, Boot
int_1, int_2, lava 100%40n=40 with verdict100%25n=25 with verdict100%27n=27 with verdict100%27n=27 with verdict1/11n=1 with verdictdeclared until Oct 2026declared until Oct 2026
mt8196-rauru-navi 4 observed devices, Boot
int_1, int_2, lava 100%40n=40 with verdict100%25n=25 with verdict···declared until Oct 2026declared until Oct 2026
sc7180-trogdor-lazor-limozeen 4 observed devices, Boot
int_1, int_2, lava 100%43n=41 with verdict100%26n=26 with verdict96%27n=27 with verdict100%27n=27 with verdict1/11n=1 with verdict2/22n=2 with verdictdeclared until Oct 2026
Raspberry Pi
bcm2837-rpi-3-b-32 2 observed devices, Boot
int_1, lava 100%80n=80 with verdict····declared until Oct 2026declared until Oct 2026
STMicroelectronics
stm32mp15x-eval 3 observed devices, Boot
int_1, lava 100%40n=40 with verdict100%25n=25 with verdict100%26n=26 with verdict100%27n=27 with verdict·declared until Oct 2026declared until Oct 2026

TF-M

Scroll the matrix sideways to see every branch.

TF-M boards by branch and suite, last 30 days, branch and nightly.
Board and suitemainreleaseUnattributed
Arm
musca-b 9 observed devices, 107.4 assertions
NS_SYSTEM_BOOTING declared until Oct 2026·declared until Sep 2026
mcuboot_suite 100%150n=150 with verdict·declared until Oct 2026
non_secure_regression_suite 100%150n=150 with verdict·declared until Oct 2026
psa_api_suite ··declared until Aug 2026
secure_regression_suite 100%150n=150 with verdict·declared until Oct 2026
NXP
frdmmcxn947 3 observed devices, 156.0 assertions
non_secure_regression_suite 100%30n=30 with verdict·declared until Oct 2026
secure_regression_suite 100%30n=30 with verdict·declared until Oct 2026
lpcxpresso55s69 3 observed devices, 139.1 assertions
NS_SYSTEM_BOOTING declared until Oct 2026·declared until Sep 2026
non_secure_regression_suite 100%30n=30 with verdict·declared until Oct 2026
secure_regression_suite 100%30n=30 with verdict·declared until Oct 2026
STMicroelectronics
b-u585i-iot02a 3 observed devices, 194.6 assertions
non_secure_regression_suite 100%70n=70 with verdict·declared until Oct 2026
secure_regression_suite 100%70n=70 with verdict·declared until Oct 2026
stm32h573i-dk 3 observed devices, 194.6 assertions
non_secure_regression_suite 100%70n=70 with verdict·declared until Oct 2026
secure_regression_suite 100%70n=70 with verdict·declared until Oct 2026
stm32u3c5zi-q 3 observed devices, 198.0 assertions
non_secure_regression_suite 2/22n=2 with verdict··
secure_regression_suite 2/22n=2 with verdict··
stm32wba65i-dk1 4 observed devices, 197.0 assertions
non_secure_regression_suite 100%68n=68 with verdict·declared until Oct 2026
secure_regression_suite 100%68n=68 with verdict·declared until Oct 2026
Other boards
nucleo-u3c5zi-q 3 observed devices, 196.2 assertions
non_secure_regression_suite 100%10n=10 with verdict··
secure_regression_suite 100%10n=10 with verdict··

How to read the matrix

  • Pass
  • Code: a test failed, or the job failed after boot
  • Lab: the run did not complete for lab reasons
  • Cancelled
  • Unclassified: the cause was not recorded
  • Declared in job definitions, not observed in this window. Declared never means passed.
  • No observation: we did not see this run, which is not the same as unsupported
  • Last 10 evaluations, oldest on the left. Short means pass, tall means a problem; hatched is the lab, solid is the code; a capped short tick passed on retry.

Rate is evaluations that passed after retries, out of evaluations that passed or failed in the code. With fewer than 5 of those it is shown as a fraction. The base n counts pass and code verdicts. The count beside the rate includes all evaluations, including lab, cancelled and unclassified.

Not shown here: FVP and QEMU testing, which runs in TuxSuite, and Allow-CI +1 runs, which are build-only and never reach a board. Their absence from this page is not a coverage gap.

12 months of CI attempts

Job level: attempts per month and how many completed. Test-case detail exists only for the live window. Months without data are drawn as gaps, never as zero.

TF-A
Table view
MonthCompleteIncompleteCancelledCompletionDays covered
Nov 20254969179096.5% of 514830 of 30
Dec 20255447120097.8% of 556731 of 31
Jan 20265785297195.1% of 608231 of 31
Feb 202649221313078.9% of 623527 of 28
Mar 202684632142297.5% of 867731 of 31
Apr 202612865635176995.3% of 1350030 of 30
May 2026115626158794.9% of 1217731 of 31
Jun 20261358542438797.0% of 1400930 of 30
Jul 20261604514784499.1% of 1619231 of 31
Aug 2026115878617299.3% of 1167331 of 31
Sep 20261478710715599.3% of 1489430 of 30
Oct 20261336320211498.5% of 1356529 of 29
TF-M
Table view
MonthCompleteIncompleteCancelledCompletionDays covered
Nov 202510044111198.9% of 1015530 of 30
Dec 202590442611097.2% of 930531 of 31
Jan 2026680215270697.8% of 695431 of 31
Feb 20263712224921362.3% of 596127 of 28
Mar 2026706215922097.8% of 722131 of 31
Apr 20261024054337295.0% of 1078330 of 30
May 2026448176399.8% of 448831 of 31
Jun 202632131111999.7% of 322430 of 30
Jul 20261238167188.1% of 140531 of 31
Aug 20261566183089.5% of 174931 of 31
Sep 2026932147086.4% of 107930 of 30
Oct 20268005099.4% of 80529 of 29
Job-level history: 1 Oct 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 29 Oct 2026. 1 day without data.
All gaps
  • No data held: 28 Feb 2026 to 28 Feb 2026