TF test results
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Data as of 28 Oct 2026, 13:02 UTC

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28 Oct 2026, 13:02 UTC
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28 Oct 2026, 13:03 UTC
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About the data

Board test coverage

Which boards in TF CI were seen testing which firmware branch, and with what result. Test results for the last 30 days; older history is at job level only.

Fleet health checks

18 board types, 58 devices live. 1 retired since Oct 2024: Juno-R2.

Window
Runs
Names
Project

TF-A

Scroll the matrix sideways to see every branch.

TF-A boards by branch and suite, last 30 days, all ci runs.
Board and suitemasterLTS 2.14LTS 2.12LTS 2.10LTS 2.8integrationUnattributed
Arm
Juno 22 observed devices, Boot, 14.4 checks
Linux boot 99%484n=484 with verdict100%525n=525 with verdict100%392n=392 with verdict100%442n=442 with verdict100%560n=560 with verdict100%1,103n=1,103 with verdict100%72n=72 with verdict
Linux shutdown 100%82n=82 with verdict100%88n=88 with verdict100%66n=66 with verdict100%74n=74 with verdict100%94n=94 with verdict100%184n=184 with verdict100%12n=12 with verdict
TFTF (Trusted Firmware Test Framework) 100%932n=932 with verdict100%994n=994 with verdict99%774n=774 with verdict100%857n=853 with verdict100%1,049n=1,046 with verdict100%1,828n=1,828 with verdict100%150n=150 with verdict
TFTF run checks 100%157n=157 with verdict100%173n=173 with verdict100%131n=131 with verdict100%148n=148 with verdict100%187n=187 with verdict100%363n=363 with verdict100%24n=24 with verdict
N1SDP 2 observed devices, Boot
TF-A boot to UEFI 100%40n=40 with verdict100%44n=44 with verdict100%33n=33 with verdict100%37n=37 with verdict100%47n=47 with verdict100%94n=94 with verdict100%6n=6 with verdict
TFTF (Trusted Firmware Test Framework) 100%49n=49 with verdict100%30n=30 with verdict100%31n=31 with verdictno verdict1n=0 with verdict··100%10n=10 with verdict
Chromebook
Asurada (MT8192) 3 observed devices, Boot
BL31 boot to depthcharge 100%40n=40 with verdict100%45n=45 with verdict100%33n=33 with verdict100%37n=37 with verdict100%47n=47 with verdict100%94n=94 with verdict100%6n=6 with verdict
Cherry (MT8195) 3 observed devices, Boot
BL31 boot to depthcharge 100%40n=40 with verdict100%44n=44 with verdict100%33n=33 with verdict100%37n=37 with verdict1/11n=1 with verdict100%95n=95 with verdict100%6n=6 with verdict
Corsola (MT8186) 3 observed devices, Boot
BL31 boot to depthcharge 100%39n=39 with verdict100%44n=44 with verdict100%33n=33 with verdict100%37n=37 with verdict1/11n=1 with verdict100%95n=95 with verdict100%6n=6 with verdict
Geralt (MT8188) 3 observed devices, Boot
BL31 boot to depthcharge 100%39n=39 with verdict100%45n=45 with verdict100%32n=32 with verdict100%36n=36 with verdict1/11n=1 with verdict100%88n=88 with verdict100%5n=5 with verdict
Rauru (MT8196) 4 observed devices, Boot
BL31 boot to depthcharge 100%39n=39 with verdict100%44n=44 with verdict···100%93n=93 with verdict100%5n=5 with verdict
Trogdor (SC7180) 4 observed devices, Boot
BL31 boot to depthcharge 100%42n=40 with verdict100%46n=45 with verdict96%33n=33 with verdict100%37n=37 with verdict1/11n=1 with verdict98%96n=96 with verdict100%6n=6 with verdict
Raspberry Pi
RPi (BCM2837) 2 observed devices, Boot
TF-A boot to Linux 100%78n=78 with verdict····100%189n=189 with verdict100%12n=12 with verdict
STMicroelectronics
STM32MP15X-Eval 3 observed devices, Boot
SP_min boot to Linux 100%39n=39 with verdict100%44n=44 with verdict100%32n=32 with verdict100%37n=37 with verdict·100%95n=95 with verdict100%6n=6 with verdict

TF-M

Scroll the matrix sideways to see every branch.

TF-M boards by branch and suite, last 30 days, all ci runs.
Board and suitemainreleaseUnattributed
Arm
Musca-B 9 observed devices, 107.4 assertions
Non-secure boot declared until Oct 2026·declared until Sep 2026
MCUboot integration 100%145n=145 with verdict·100%20n=20 with verdict
Non-secure regression 100%145n=145 with verdict·100%20n=20 with verdict
PSA API compliance ··declared until Aug 2026
Secure regression 100%145n=145 with verdict·100%20n=20 with verdict
NXP
FRDMMCXN947 3 observed devices, 156.0 assertions
Non-secure regression 100%29n=29 with verdict·4/44n=4 with verdict
Secure regression 100%29n=29 with verdict·4/44n=4 with verdict
LPCXpresso55S69 3 observed devices, 139.1 assertions
Non-secure boot declared until Oct 2026·declared until Sep 2026
Non-secure regression 100%29n=29 with verdict·4/44n=4 with verdict
Secure regression 100%29n=29 with verdict·4/44n=4 with verdict
STMicroelectronics
B-U585I-IOT02A 3 observed devices, 194.6 assertions
Non-secure regression 100%206n=206 with verdict·100%38n=38 with verdict
Secure regression 100%206n=206 with verdict·100%38n=38 with verdict
STM32H573I-DK 3 observed devices, 194.6 assertions
Non-secure regression 100%206n=206 with verdict·100%38n=38 with verdict
Secure regression 100%206n=206 with verdict·100%38n=38 with verdict
STM32U3C5ZI-Q 3 observed devices, 198.0 assertions
Non-secure regression 2/22n=2 with verdict··
Secure regression 2/22n=2 with verdict··
STM32WBA65I-DK1 4 observed devices, 197.0 assertions
Non-secure regression 100%66n=66 with verdict·100%8n=8 with verdict
Secure regression 100%66n=66 with verdict·100%8n=8 with verdict
Other boards
Nucleo-U3C5ZI-Q 3 observed devices, 195.8 assertions
Non-secure regression 100%8n=8 with verdict··
Secure regression 100%8n=8 with verdict··

How to read the matrix

  • Pass
  • Code: a test failed, or the job failed after boot
  • Lab: the run did not complete for lab reasons
  • Cancelled
  • Unclassified: the cause was not recorded
  • Declared in job definitions, not observed in this window. Declared never means passed.
  • No observation: we did not see this run, which is not the same as unsupported
  • Last 10 evaluations, oldest on the left. Short means pass, tall means a problem; hatched is the lab, solid is the code; a capped short tick passed on retry.

Rate is evaluations that passed after retries, out of evaluations that passed or failed in the code. With fewer than 5 of those it is shown as a fraction. The base n counts pass and code verdicts. The count beside the rate includes all evaluations, including lab, cancelled and unclassified.

Not shown here: FVP and QEMU testing, which runs in TuxSuite, and Allow-CI +1 runs, which are build-only and never reach a board. Their absence from this page is not a coverage gap.

12 months of CI attempts

Job level: attempts per month and how many completed. Test-case detail exists only for the live window. Months without data are drawn as gaps, never as zero.

TF-A
Table view
MonthCompleteIncompleteCancelledCompletionDays covered
Nov 20254969179096.5% of 514830 of 30
Dec 20255447120097.8% of 556731 of 31
Jan 20265785297195.1% of 608231 of 31
Feb 202649221313078.9% of 623527 of 28
Mar 202684632142297.5% of 867731 of 31
Apr 202612865635176995.3% of 1350030 of 30
May 2026115626158794.9% of 1217731 of 31
Jun 20261358542438797.0% of 1400930 of 30
Jul 20261604514784499.1% of 1619231 of 31
Aug 2026115878617299.3% of 1167331 of 31
Sep 20261478710715599.3% of 1489430 of 30
Oct 20261282020111498.5% of 1302128 of 28
TF-M
Table view
MonthCompleteIncompleteCancelledCompletionDays covered
Nov 202510044111198.9% of 1015530 of 30
Dec 202590442611097.2% of 930531 of 31
Jan 2026680215270697.8% of 695431 of 31
Feb 20263712224921362.3% of 596127 of 28
Mar 2026706215922097.8% of 722131 of 31
Apr 20261024054337295.0% of 1078330 of 30
May 2026448176399.8% of 448831 of 31
Jun 202632131111999.7% of 322430 of 30
Jul 20261238167188.1% of 140531 of 31
Aug 20261566183089.5% of 174931 of 31
Sep 2026932147086.4% of 107930 of 30
Oct 20267775099.4% of 78228 of 28
Job-level history: 1 Oct 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 28 Oct 2026. 1 day without data.
All gaps
  • No data held: 28 Feb 2026 to 28 Feb 2026