TF test results
Synced 18:18 UTC, 2 h ago

Data as of 30 Oct 2026, 18:18 UTC

Last LAVA sync
30 Oct 2026, 18:18 UTC
Last Jenkins sync
30 Oct 2026, 18:20 UTC
Last S3 export sync
7 Oct 2026, 09:53 UTC
Open fetch errors
6,518
About the data
  1. Boards
  2. Google ChromeOS
  3. Trogdor (SC7180)

Trogdor (SC7180)

SC7180, Trogdor, Chromebook. sc7180-trogdor-lazor-limozeen

Live First seen 1 Oct 2025, last seen 30 Oct 2026. 3 units live.

Evaluations

2,817

3,101 attempts, 0 cancelled

Completion

88.3%

of 3,101 attempts

Complete out of complete and incomplete attempts. Cancelled attempts are listed, never counted.

Evaluated pass rate

99.4%

of 496 evaluations with a verdict

Final attempts that passed, out of pass and code. Lab 36, cancelled 0 and unclassified 42 are shown, never folded in.

Failed after retries

81 of 2,817

292 failed first time, 211 passed on retry

Changes with a failed boot on this board

n/a

Not available for this range: change lineage exists for the live window only.

Last 12 months

Evaluations per week, stacked by final outcome. Hatched means the lab, solid means the code.

Job-level history: 27 Oct 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 30 Oct 2026. 1 day without data.
All gaps
  • No data held: 28 Feb 2026 to 28 Feb 2026

History by month

Before the live window we know whether each attempt completed and how retries ended, not why it failed or which change it was. Shaded bands are months with no data held.

Job-level history: 1 Oct 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 30 Oct 2026. 1 day without data.
All gaps
  • No data held: 28 Feb 2026 to 28 Feb 2026

Units

CI attempts per physical unit, retries included. Passing on another unit can help identify a unit fault. Health checks are fleet health.
lazor-03 762 122 87 8 Complete 30 Oct 12:12
lazor-01 1,100 100 66 9 Complete 30 Oct 11:41
lazor-02 1,239 70 35 6 Complete 30 Oct 09:31

Evaluations

One row per builder build on this board, newest first, with every attempt. CI runs only; 50 of 2,817 shown.

Attempts
9 Oct 12:23 tf-a-lts2.10-builder 282799 55232/1 chore(fvp): bump maximum permitted Trusted SRAM size lts-v2.10 built refs/changes/32/55232/1
  1. 03Pass
 Pass
9 Oct 10:45 tf-a-builder 2569618 55229/1 fix(lfa): avoid ACTIVATE retry code clash integration built refs/changes/29/55229/1
  1. 01Pass
 Pass
9 Oct 09:54 tf-a-builder 2568568 55227/1 refactor(cpus): move C support files into the helpers directory integration built refs/changes/27/55227/1
  1. 01Lab
  2. 02Pass
 Passed on retry
9 Oct 08:15 tf-a-builder 2567707 55227/1 refactor(cpus): move C support files into the helpers directory integration built refs/changes/27/55227/1
  1. 01Pass
 Pass
9 Oct 06:53 tf-a-builder 2566995 not recorded master
  1. 02Pass
 Pass
9 Oct 01:32 tf-a-lts2.10-builder 281942 not recorded lts-v2.10
  1. 01Pass
 Pass
9 Oct 00:38 tf-a-lts2.12-builder 339413 not recorded lts-v2.12
  1. 03Pass
 Pass
8 Oct 23:31 tf-a-lts2.14-builder 242863 not recorded lts-v2.14
  1. 01Pass
 Pass
8 Oct 22:24 tf-a-builder 2565252 not recorded master built integration
  1. 01Pass
 Pass
8 Oct 21:30 tf-a-builder 2564457 not recorded master built integration
  1. 02Pass
 Pass
8 Oct 17:24 tf-a-lts2.10-builder 281387 55220/1 fix(fvp): absorb BUILD_CPUS_WITH_NO_FVP_MODEL and ENABLE_ERRATA_ALL cores lts-v2.10 built refs/changes/20/55220/1
  1. 01Pass
 Pass
8 Oct 08:46 tf-a-lts2.14-builder 242076 55214/2 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/2
  1. 01Pass
 Pass
8 Oct 08:22 tf-a-lts2.14-builder 241471 55214/1 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/1
  1. 02Pass
 Pass
8 Oct 06:56 tf-a-builder 2561501 55188/2 fix(fvp): remove GIC crash reporting integration built refs/changes/88/55188/2
  1. 03Pass
 Pass
8 Oct 06:35 tf-a-builder 2560984 54926/4 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/4
  1. 03Pass
 Pass
8 Oct 01:38 tf-a-lts2.10-builder 280589 not recorded lts-v2.10
  1. 01Pass
 Pass
8 Oct 00:36 tf-a-lts2.12-builder 338580 not recorded lts-v2.12
  1. 01Lab
  2. 03Pass
 Passed on retry
7 Oct 23:30 tf-a-lts2.14-builder 240642 not recorded lts-v2.14
  1. 01Pass
 Pass
7 Oct 22:35 tf-a-builder 2560376 not recorded master built integration
  1. 01Pass
 Pass
7 Oct 14:58 tf-a-builder 2559035 52109/5 refactor(lfa): add fallback support integration built refs/changes/09/52109/5
  1. 02Pass
 Pass
7 Oct 12:49 tf-a-builder 2558839 54137/7 fix(cpufeat): correctly match the group 3 ID registers space integration built refs/changes/37/54137/7
  1. 01Pass
 Pass
7 Oct 12:16 tf-a-builder 2557959 55180/2 refactor(el3-spmc): remove excess overflow checks integration built refs/changes/80/55180/2
  1. 01Lab
  2. 02Pass
 Passed on retry
7 Oct 10:37 tf-a-builder 2557146 55179/1 fix(firme): fix attestation unmap error handling integration built refs/changes/79/55179/1
  1. 02Pass
 Pass
7 Oct 01:23 tf-a-lts2.10-builder 279573 not recorded lts-v2.10
  1. 01Pass
 Pass
7 Oct 00:28 tf-a-lts2.12-builder 337796 not recorded lts-v2.12
  1. 01Pass
 Pass
6 Oct 23:28 tf-a-lts2.14-builder 239802 not recorded lts-v2.14
  1. 02Pass
 Pass
6 Oct 22:29 tf-a-builder 2550662 not recorded master built integration
  1. 01Pass
 Pass
6 Oct 21:17 tf-a-builder 2550488 55088/2 fix(psci): run the arch setup before pwr_domain_on_finish() integration built refs/changes/88/55088/2
  1. 02Pass
 Pass
6 Oct 20:56 tf-a-builder 2549736 54926/2 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/2
  1. 03Pass
 Pass
6 Oct 17:19 tf-a-builder 2548094 not recorded master
  1. 03Pass
 Pass
6 Oct 10:15 tf-a-builder 2547405 54944/2 refactor(cpus): separate helper files from cpu implementations integration built refs/changes/44/54944/2
  1. 01Lab
  2. 02Pass
 Passed on retry
6 Oct 01:32 tf-a-lts2.10-builder 278933 not recorded lts-v2.10
  1. 01Pass
 Pass
6 Oct 00:33 tf-a-lts2.12-builder 337172 not recorded lts-v2.12
  1. 01Pass
 Pass
5 Oct 23:40 tf-a-lts2.14-builder 239163 not recorded lts-v2.14
  1. 02Pass
 Pass
5 Oct 22:14 tf-a-builder 2544563 not recorded master built integration
  1. 02Pass
 Pass
5 Oct 13:12 tf-a-builder 2544305 55088/1 fix(psci): run the arch setup before pwr_domain_on_finish() integration built refs/changes/88/55088/1
  1. 03Pass
 Pass
5 Oct 11:42 tf-a-builder 2543565 not recorded master
  1. 02Pass
 Pass
5 Oct 10:47 tf-a-builder 2542474 55087/1 fix(tsp): use VERBOSE instead of INFO integration built refs/changes/87/55087/1
  1. 02Pass
 Pass
5 Oct 10:10 tf-a-builder 2541997 53789/9 refactor(gpt_rme): split gpt lib to RME init and RME GPT runtime integration built refs/changes/89/53789/9
  1. 03Pass
 Pass
5 Oct 08:13 tf-a-builder 2540139 55071/2 refactor(fvp): Update platform token to spec 2.0-bet3 integration built refs/changes/71/55071/2
  1. 01Pass
 Pass
5 Oct 01:21 tf-a-lts2.10-builder 277922 not recorded lts-v2.10
  1. 03Pass
 Pass
5 Oct 00:29 tf-a-lts2.12-builder 336318 not recorded lts-v2.12
  1. 03Pass
 Pass
4 Oct 23:34 tf-a-lts2.14-builder 238217 not recorded lts-v2.14
  1. 03Pass
 Pass
4 Oct 22:21 tf-a-builder 2537907 not recorded master built integration
  1. 03Code
  2. 02Pass
 Passed on retry
4 Oct 01:40 tf-a-lts2.10-builder 277439 not recorded lts-v2.10
  1. 01Pass
 Pass
4 Oct 00:31 tf-a-lts2.12-builder 335598 not recorded lts-v2.12
  1. 01Pass
 Pass
3 Oct 23:31 tf-a-lts2.14-builder 237229 not recorded lts-v2.14
  1. 01Lab
  2. 03Pass
 Passed on retry
3 Oct 22:20 tf-a-builder 2537222 not recorded Branch not recorded
  1. 02Pass
 Pass
3 Oct 01:34 tf-a-lts2.10-builder 276652 not recorded lts-v2.10
  1. 01Pass
 Pass
3 Oct 00:24 tf-a-lts2.12-builder 334611 not recorded lts-v2.12
  1. 02Pass
 Pass

Show the next 50

Fleet health

Health checks, not CI results. They never count towards any rate on this page.

8 of 32 health checks failed in the last 7 days.

8 failed in 7 days, latest passed

Showing the latest 32 checks.

  1. Health check 3049169, Complete
  2. Health check 3049176, Complete
  3. Health check 3049341, Complete
  4. Health check 3049531, Complete
  5. Health check 3049540, Complete
  6. Health check 3049649, Complete
  7. Health check 3049791, Complete
  8. Health check 3049865, Complete
  9. Health check 3049986, Complete
  10. Health check 3050494, Incomplete
  11. Health check 3050552, Incomplete
  12. Health check 3050668, Incomplete
  13. Health check 3050997, Complete
  14. Health check 3050998, Complete
  15. Health check 3050999, Complete
  16. Health check 3051000, Complete
  17. Health check 3051307, Incomplete
  18. Health check 3051602, Incomplete
  19. Health check 3051624, Incomplete
  20. Health check 3051632, Complete
  21. Health check 3051635, Complete
  22. Health check 3051640, Complete
  23. Health check 3052170, Complete
  24. Health check 3052171, Complete
  25. Health check 3052173, Incomplete
  26. Health check 3052175, Complete
  27. Health check 3052294, Incomplete
  28. Health check 3052311, Complete
  29. Health check 3052921, Complete
  30. Health check 3052933, Complete
  31. Health check 3052982, Complete
  32. Health check 3053068, Complete

One tick per health check, oldest to newest. Each opens its job. Passed Failed Cancelled

Incidents

  1. Lab 17 Sep 2026 to 18 Sep 2026

    LAVA logger DNS failures