TF test results
Synced 12:21 UTC, 5 h ago

Data as of 29 Oct 2026, 12:21 UTC

Last LAVA sync
29 Oct 2026, 12:21 UTC
Last Jenkins sync
29 Oct 2026, 12:23 UTC
Last S3 export sync
7 Oct 2026, 09:53 UTC
Open fetch errors
6,510
About the data
  1. Boards
  2. Arm
  3. N1SDP

N1SDP

, Arm. n1sdp

Live First seen 1 Oct 2025, last seen 29 Oct 2026. 2 units live.

Evaluations

3,321

3,354 attempts, 86 cancelled

Completion

98.6%

of 3,268 attempts

Complete out of complete and incomplete attempts. Cancelled attempts are listed, never counted.

Evaluated pass rate

100.0%

of 773 evaluations with a verdict

Final attempts that passed, out of pass and code. Lab 0, cancelled 86 and unclassified 16 are shown, never folded in.

Failed after retries

16 of 3,321

31 failed first time, 11 passed on retry

Changes with a failed boot on this board

n/a

Not available for this range: change lineage exists for the live window only.

Last 12 months

Evaluations per week, stacked by final outcome. Hatched means the lab, solid means the code.

Job-level history: 27 Oct 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 29 Oct 2026. 1 day without data.
All gaps
  • No data held: 28 Feb 2026 to 28 Feb 2026

History by month

Before the live window we know whether each attempt completed and how retries ended, not why it failed or which change it was. Shaded bands are months with no data held.

Job-level history: 1 Oct 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 29 Oct 2026. 1 day without data.
All gaps
  • No data held: 28 Feb 2026 to 28 Feb 2026

Units

CI attempts per physical unit, retries included. Passing on another unit can help identify a unit fault. Health checks are fleet health.

27 of 31 first-attempt failures were on n1sdp-01; 0 of them passed on another unit.
n1sdp-01 3,012 27 0 7 Complete 29 Oct 11:24
n1sdp-02 256 4 3 1 Complete 28 Oct 13:48

Evaluations

One row per builder build on this board, newest first, with every attempt. CI runs only; 50 of 3,321 shown.

Attempts
9 Oct 00:18 tf-a-lts2.14-builder 243129 not recorded lts-v2.14
  1. 01Pass
 Pass
8 Oct 23:28 tf-a-lts2.14-builder 242756 not recorded lts-v2.14
  1. 02Pass
 Pass
8 Oct 23:03 tf-a-builder 2565515 not recorded master built integration
  1. 01Pass
 Pass
8 Oct 23:00 tf-a-builder 2565456 not recorded master built integration
  1. 01Pass
 Pass
8 Oct 22:27 tf-a-builder 2565312 not recorded master built integration
  1. 02Pass
 Pass
8 Oct 21:32 tf-a-builder 2564532 not recorded master built integration
  1. 02Pass
 Pass
8 Oct 17:23 tf-a-lts2.10-builder 281285 55220/1 fix(fvp): absorb BUILD_CPUS_WITH_NO_FVP_MODEL and ENABLE_ERRATA_ALL cores lts-v2.10 built refs/changes/20/55220/1
  1. 02Pass
 Pass
8 Oct 08:40 tf-a-lts2.14-builder 241874 55214/2 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/2
  1. 01Pass
 Pass
8 Oct 08:22 tf-a-lts2.14-builder 241485 55214/1 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/1
  1. 01Pass
 Pass
8 Oct 06:58 tf-a-builder 2561566 55188/2 fix(fvp): remove GIC crash reporting integration built refs/changes/88/55188/2
  1. 02Pass
 Pass
8 Oct 06:33 tf-a-builder 2560904 54926/4 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/4
  1. 02Pass
 Pass
8 Oct 02:23 tf-a-lts2.8-builder 219835 not recorded lts-v2.8
  1. 02Pass
 Pass
8 Oct 01:30 tf-a-lts2.10-builder 280462 not recorded lts-v2.10
  1. 02Pass
 Pass
8 Oct 01:10 tf-a-lts2.12-builder 338853 not recorded lts-v2.12
  1. 01Pass
 Pass
8 Oct 00:37 tf-a-lts2.14-builder 240918 not recorded lts-v2.14
  1. 01Pass
 Pass
8 Oct 00:27 tf-a-lts2.12-builder 338350 not recorded lts-v2.12
  1. 01Pass
 Pass
7 Oct 23:48 tf-a-builder 2560489 not recorded master built integration
  1. 01Pass
 Pass
7 Oct 23:47 tf-a-builder 2560470 not recorded master built integration
  1. 02Pass
 Pass
7 Oct 23:19 tf-a-lts2.14-builder 240245 not recorded lts-v2.14
  1. 02Pass
 Pass
7 Oct 22:31 tf-a-builder 2560127 not recorded master built integration
  1. 02Pass
 Pass
7 Oct 15:02 tf-a-builder 2559091 52109/5 refactor(lfa): add fallback support integration built refs/changes/09/52109/5
  1. 02Pass
 Pass
7 Oct 12:30 tf-a-builder 2558263 54137/7 fix(cpufeat): correctly match the group 3 ID registers space integration built refs/changes/37/54137/7
  1. 01Pass
 Pass
7 Oct 12:15 tf-a-builder 2557982 55180/2 refactor(el3-spmc): remove excess overflow checks integration built refs/changes/80/55180/2
  1. 01Pass
 Pass
7 Oct 10:39 tf-a-builder 2557198 55179/1 fix(firme): fix attestation unmap error handling integration built refs/changes/79/55179/1
  1. 02Pass
 Pass
7 Oct 02:40 tf-a-lts2.8-builder 219522 not recorded lts-v2.8
  1. 01Pass
 Pass
7 Oct 01:35 tf-a-lts2.10-builder 279824 not recorded lts-v2.10
  1. 02Pass
 Pass
7 Oct 01:16 tf-a-lts2.12-builder 338101 not recorded lts-v2.12
  1. 01Pass
 Pass
7 Oct 00:30 tf-a-lts2.12-builder 337839 not recorded lts-v2.12
  1. 01Pass
 Pass
7 Oct 00:03 tf-a-lts2.14-builder 240109 not recorded lts-v2.14
  1. 01Pass
 Pass
6 Oct 23:48 tf-a-builder 2551354 not recorded master built integration
  1. 02Pass
 Pass
6 Oct 23:48 tf-a-builder 2551353 not recorded master built integration
  1. 01Pass
 Pass
6 Oct 23:28 tf-a-lts2.14-builder 239750 not recorded lts-v2.14
  1. 02Pass
 Pass
6 Oct 22:47 tf-a-builder 2551030 not recorded master built integration
  1. 01Pass
 Pass
6 Oct 21:09 tf-a-builder 2550304 55088/2 fix(psci): run the arch setup before pwr_domain_on_finish() integration built refs/changes/88/55088/2
  1. 01Pass
 Pass
6 Oct 20:56 tf-a-builder 2549726 54926/2 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/2
  1. 01Pass
 Pass
6 Oct 17:23 tf-a-builder 2548135 not recorded master
  1. 01Pass
 Pass
6 Oct 10:10 tf-a-builder 2547319 54944/2 refactor(cpus): separate helper files from cpu implementations integration built refs/changes/44/54944/2
  1. 01Pass
 Pass
6 Oct 02:32 tf-a-lts2.8-builder 218947 not recorded lts-v2.8
  1. 01Pass
 Pass
6 Oct 01:27 tf-a-lts2.10-builder 278811 not recorded lts-v2.10
  1. 02Pass
 Pass
6 Oct 01:02 tf-a-lts2.12-builder 337349 not recorded lts-v2.12
  1. 01Pass
 Pass
6 Oct 00:35 tf-a-lts2.12-builder 337225 not recorded lts-v2.12
  1. 01Pass
 Pass
5 Oct 23:59 tf-a-lts2.14-builder 239262 not recorded lts-v2.14
  1. 01Pass
 Pass
5 Oct 23:27 tf-a-lts2.14-builder 238807 not recorded lts-v2.14
  1. 01Pass
 Pass
5 Oct 23:00 tf-a-builder 2545207 not recorded master built integration
  1. 01Pass
 Pass
5 Oct 23:00 tf-a-builder 2545209 not recorded master built integration
  1. 02Pass
 Pass
5 Oct 22:19 tf-a-builder 2544700 not recorded master built integration
  1. 02Pass
 Pass
5 Oct 13:12 tf-a-builder 2544259 55088/1 fix(psci): run the arch setup before pwr_domain_on_finish() integration built refs/changes/88/55088/1
  1. 02Pass
 Pass
5 Oct 11:41 tf-a-builder 2543495 not recorded master
  1. 02Pass
 Pass
5 Oct 10:49 tf-a-builder 2542542 55087/1 fix(tsp): use VERBOSE instead of INFO integration built refs/changes/87/55087/1
  1. 01Pass
 Pass
5 Oct 10:10 tf-a-builder 2542012 53789/9 refactor(gpt_rme): split gpt lib to RME init and RME GPT runtime integration built refs/changes/89/53789/9
  1. 02Pass
 Pass

Show the next 50

Fleet health

Health checks, not CI results. They never count towards any rate on this page.

0 of 13 health checks failed in the last 7 days.

All passed

Showing the latest 13 checks.

  1. Health check 3048915, Complete
  2. Health check 3048928, Complete
  3. Health check 3049359, Complete
  4. Health check 3049371, Complete
  5. Health check 3049691, Complete
  6. Health check 3049703, Complete
  7. Health check 3050180, Complete
  8. Health check 3050208, Complete
  9. Health check 3051132, Complete
  10. Health check 3051144, Complete
  11. Health check 3051683, Complete
  12. Health check 3051698, Complete
  13. Health check 3052304, Complete

One tick per health check, oldest to newest. Each opens its job. Passed Failed Cancelled

Incidents

  1. Lab 17 Sep 2026 to 18 Sep 2026

    LAVA logger DNS failures