TF test results
Synced 06:22 UTC, 3 h ago

Data as of 30 Oct 2026, 06:22 UTC

Last LAVA sync
30 Oct 2026, 06:22 UTC
Last Jenkins sync
30 Oct 2026, 06:24 UTC
Last S3 export sync
7 Oct 2026, 09:53 UTC
Open fetch errors
6,510
About the data
  1. Boards
  2. Arm
  3. N1SDP

N1SDP

, Arm. n1sdp

Live First seen 1 Oct 2025, last seen 30 Oct 2026. 2 units live.

Evaluations

423

427 attempts, 0 cancelled

Completion

99.1%

of 427 attempts

Complete out of complete and incomplete attempts. Cancelled attempts are listed, never counted.

Evaluated pass rate

100.0%

of 423 evaluations with a verdict

Final attempts that passed, out of pass and code. Lab 0, cancelled 0 and unclassified 0 are shown, never folded in.

Failed after retries

0 of 423

4 failed first time, 4 passed on retry

Changes with a failed boot on this board

0 of 111

Allow-CI+2 for TF-A; linked TF-M runs. 0 with no boot verdict. Linked to a change: 31.0% of 423 evaluations

Last 30 days

Evaluations per day, stacked by final outcome. Hatched means the lab, solid means the code.

Test-case detail: 1 Oct 2026 to 30 Oct 2026. 0 days without data.

History by month

Before the live window we know whether each attempt completed and how retries ended, not why it failed or which change it was. Shaded bands are months with no data held.

Job-level history: 1 Oct 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 30 Oct 2026. 1 day without data.
All gaps
  • No data held: 28 Feb 2026 to 28 Feb 2026

Units

CI attempts per physical unit, retries included. Passing on another unit can help identify a unit fault. Health checks are fleet health.

4 of 4 first-attempt failures were on n1sdp-02; 3 of them passed on another unit.
n1sdp-02 212 4 3 1 Complete 29 Oct 13:49
n1sdp-01 215 0 0 0 Complete 29 Oct 11:24

Evaluations

One row per builder build on this board, newest first, with every attempt. CI runs only; 50 of 211 shown.

Unit: n1sdp-02
Attempts
9 Oct 13:17 tf-a-lts2.8-builder 223754 55233/1 feat(fvp): scale SP_MIN max size based on SRAM size lts-v2.8 built refs/changes/33/55233/1
  1. 02Pass
 Pass
9 Oct 11:29 tf-a-lts2.8-builder 223172 55231/1 chore(fvp): bump maximum permitted Trusted SRAM size lts-v2.8 built refs/changes/31/55231/1
  1. 02Pass
 Pass
9 Oct 09:57 tf-a-lts2.8-builder 222308 55228/2 fix(fvp): absorb BUILD_CPUS_WITH_NO_FVP_MODEL and ENABLE_ERRATA_ALL CPUs lts-v2.8 built refs/changes/28/55228/2
  1. 02Pass
 Pass
9 Oct 09:40 tf-a-lts2.8-builder 221682 55228/1 fix(fvp): absorb BUILD_CPUS_WITH_NO_FVP_MODEL and ENABLE_ERRATA_ALL CPUs lts-v2.8 built refs/changes/28/55228/1
  1. 02Pass
 Pass
9 Oct 09:29 tf-a-lts2.8-builder 221092 55228/1 fix(fvp): absorb BUILD_CPUS_WITH_NO_FVP_MODEL and ENABLE_ERRATA_ALL CPUs lts-v2.8 built refs/changes/28/55228/1
  1. 02Pass
 Pass
9 Oct 06:48 tf-a-builder 2566850 not recorded master
  1. 02Pass
 Pass
9 Oct 01:13 tf-a-lts2.12-builder 339605 not recorded lts-v2.12
  1. 02Pass
 Pass
9 Oct 00:40 tf-a-lts2.12-builder 339471 not recorded lts-v2.12
  1. 02Pass
 Pass
8 Oct 23:28 tf-a-lts2.14-builder 242756 not recorded lts-v2.14
  1. 02Pass
 Pass
8 Oct 22:27 tf-a-builder 2565312 not recorded master built integration
  1. 02Pass
 Pass
8 Oct 21:32 tf-a-builder 2564532 not recorded master built integration
  1. 02Pass
 Pass
8 Oct 17:23 tf-a-lts2.10-builder 281285 55220/1 fix(fvp): absorb BUILD_CPUS_WITH_NO_FVP_MODEL and ENABLE_ERRATA_ALL cores lts-v2.10 built refs/changes/20/55220/1
  1. 02Pass
 Pass
8 Oct 06:58 tf-a-builder 2561566 55188/2 fix(fvp): remove GIC crash reporting integration built refs/changes/88/55188/2
  1. 02Pass
 Pass
8 Oct 06:33 tf-a-builder 2560904 54926/4 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/4
  1. 02Pass
 Pass
8 Oct 02:23 tf-a-lts2.8-builder 219835 not recorded lts-v2.8
  1. 02Pass
 Pass
8 Oct 01:30 tf-a-lts2.10-builder 280462 not recorded lts-v2.10
  1. 02Pass
 Pass
7 Oct 23:47 tf-a-builder 2560470 not recorded master built integration
  1. 02Pass
 Pass
7 Oct 23:19 tf-a-lts2.14-builder 240245 not recorded lts-v2.14
  1. 02Pass
 Pass
7 Oct 22:31 tf-a-builder 2560127 not recorded master built integration
  1. 02Pass
 Pass
7 Oct 15:02 tf-a-builder 2559091 52109/5 refactor(lfa): add fallback support integration built refs/changes/09/52109/5
  1. 02Pass
 Pass
7 Oct 10:39 tf-a-builder 2557198 55179/1 fix(firme): fix attestation unmap error handling integration built refs/changes/79/55179/1
  1. 02Pass
 Pass
7 Oct 01:35 tf-a-lts2.10-builder 279824 not recorded lts-v2.10
  1. 02Pass
 Pass
6 Oct 23:48 tf-a-builder 2551354 not recorded master built integration
  1. 02Pass
 Pass
6 Oct 23:28 tf-a-lts2.14-builder 239750 not recorded lts-v2.14
  1. 02Pass
 Pass
6 Oct 01:27 tf-a-lts2.10-builder 278811 not recorded lts-v2.10
  1. 02Pass
 Pass
5 Oct 23:00 tf-a-builder 2545209 not recorded master built integration
  1. 02Pass
 Pass
5 Oct 22:19 tf-a-builder 2544700 not recorded master built integration
  1. 02Pass
 Pass
5 Oct 13:12 tf-a-builder 2544259 55088/1 fix(psci): run the arch setup before pwr_domain_on_finish() integration built refs/changes/88/55088/1
  1. 02Pass
 Pass
5 Oct 11:41 tf-a-builder 2543495 not recorded master
  1. 02Pass
 Pass
5 Oct 10:10 tf-a-builder 2542012 53789/9 refactor(gpt_rme): split gpt lib to RME init and RME GPT runtime integration built refs/changes/89/53789/9
  1. 02Pass
 Pass
5 Oct 08:17 tf-a-builder 2540278 55071/2 refactor(fvp): Update platform token to spec 2.0-bet3 integration built refs/changes/71/55071/2
  1. 02Pass
 Pass
5 Oct 02:15 tf-a-lts2.8-builder 218038 not recorded lts-v2.8
  1. 02Pass
 Pass
5 Oct 01:02 tf-a-lts2.12-builder 336597 not recorded lts-v2.12
  1. 02Pass
 Pass
5 Oct 00:08 tf-a-lts2.14-builder 238491 not recorded lts-v2.14
  1. 02Code
  2. 01Pass
 Passed on retry
4 Oct 23:40 tf-a-lts2.14-builder 238362 not recorded lts-v2.14
  1. 02Pass
 Pass
4 Oct 22:45 tf-a-builder 2538557 not recorded master built integration
  1. 02Pass
 Pass
4 Oct 02:16 tf-a-lts2.8-builder 217413 not recorded lts-v2.8
  1. 02Pass
 Pass
4 Oct 01:44 tf-a-lts2.10-builder 277409 not recorded lts-v2.10
  1. 02Code
  2. 01Pass
 Passed on retry
4 Oct 01:07 tf-a-lts2.12-builder 335845 not recorded lts-v2.12
  1. 02Pass
 Pass
3 Oct 23:06 tf-a-builder 2537824 not recorded Branch not recorded
  1. 02Pass
 Pass
3 Oct 02:23 tf-a-lts2.8-builder 217073 not recorded lts-v2.8
  1. 02Pass
 Pass
3 Oct 01:34 tf-a-lts2.10-builder 276658 not recorded lts-v2.10
  1. 02Pass
 Pass
3 Oct 01:07 tf-a-lts2.12-builder 335093 not recorded lts-v2.12
  1. 02Pass
 Pass
2 Oct 23:06 tf-a-builder 2536964 not recorded Branch not recorded
  1. 02Pass
 Pass
2 Oct 22:40 tf-a-builder 2536830 not recorded Branch not recorded
  1. 02Pass
 Pass
2 Oct 01:19 tf-a-lts2.10-builder 275455 not recorded lts-v2.10
  1. 02Pass
 Pass
2 Oct 00:22 tf-a-lts2.12-builder 333988 not recorded lts-v2.12
  1. 02Pass
 Pass
2 Oct 00:01 tf-a-lts2.14-builder 236064 not recorded lts-v2.14
  1. 02Pass
 Pass
1 Oct 23:36 tf-a-lts2.14-builder 235937 not recorded lts-v2.14
  1. 02Pass
 Pass
1 Oct 23:25 tf-a-builder 2532015 not recorded Branch not recorded
  1. 02Pass
 Pass

Show the next 50

Fleet health

Health checks, not CI results. They never count towards any rate on this page.

0 of 12 health checks failed in the last 7 days.

All passed

Showing the latest 12 checks.

  1. Health check 3049359, Complete
  2. Health check 3049371, Complete
  3. Health check 3049691, Complete
  4. Health check 3049703, Complete
  5. Health check 3050180, Complete
  6. Health check 3050208, Complete
  7. Health check 3051132, Complete
  8. Health check 3051144, Complete
  9. Health check 3051683, Complete
  10. Health check 3051698, Complete
  11. Health check 3052304, Complete
  12. Health check 3052319, Complete

One tick per health check, oldest to newest. Each opens its job. Passed Failed Cancelled

Incidents

  1. Lab 17 Sep 2026 to 18 Sep 2026

    LAVA logger DNS failures