TF test results
Synced 18:19 UTC, 5 h ago

Data as of 28 Oct 2026, 18:19 UTC

Last LAVA sync
28 Oct 2026, 18:19 UTC
Last Jenkins sync
28 Oct 2026, 18:32 UTC
Last S3 export sync
7 Oct 2026, 09:53 UTC
Open fetch errors
6,509
About the data
  1. Boards
  2. Google ChromeOS
  3. Cherry (MT8195)

Cherry (MT8195)

MT8195, Cherry, Chromebook. mt8195-cherry-tomato-r2

Live First seen 1 Oct 2025, last seen 28 Oct 2026. 3 units live.

Evaluations

257

257 attempts, 0 cancelled

Completion

100.0%

of 257 attempts

Complete out of complete and incomplete attempts. Cancelled attempts are listed, never counted.

Evaluated pass rate

100.0%

of 257 evaluations with a verdict

Final attempts that passed, out of pass and code. Lab 0, cancelled 0 and unclassified 0 are shown, never folded in.

Failed after retries

0 of 257

0 failed first time, 0 passed on retry

Changes with a failed boot on this board

0 of 104

Allow-CI+2 for TF-A; linked TF-M runs. 0 with no boot verdict. Linked to a change: 45.5% of 257 evaluations

Last 30 days

Evaluations per day, stacked by final outcome. Hatched means the lab, solid means the code.

Test-case detail: 29 Sep 2026 to 28 Oct 2026. 0 days without data.

History by month

Before the live window we know whether each attempt completed and how retries ended, not why it failed or which change it was. Shaded bands are months with no data held.

Job-level history: 1 Oct 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 28 Oct 2026. 1 day without data.
All gaps
  • No data held: 28 Feb 2026 to 28 Feb 2026

Units

CI attempts per physical unit, retries included. Passing on another unit can help identify a unit fault. Health checks are fleet health.
tomato-01 88 0 0 0 Complete 28 Oct 11:31
tomato-02 78 0 0 0 Complete 28 Oct 11:33
tomato-03 91 0 0 0 Complete 28 Oct 11:29

Evaluations

One row per builder build on this board, newest first, with every attempt. CI runs only; 50 of 257 shown.

Attempts
12 Oct 00:28 tf-a-lts2.12-builder 341535 not recorded lts-v2.12
  1. 03Pass
 Pass
11 Oct 23:25 tf-a-lts2.14-builder 245140 not recorded lts-v2.14
  1. 02Pass
 Pass
11 Oct 22:20 tf-a-builder 2576064 not recorded master built integration
  1. 02Pass
 Pass
11 Oct 01:24 tf-a-lts2.10-builder 284716 not recorded lts-v2.10
  1. 03Pass
 Pass
11 Oct 00:26 tf-a-lts2.12-builder 340785 not recorded lts-v2.12
  1. 02Pass
 Pass
10 Oct 23:31 tf-a-lts2.14-builder 244557 not recorded lts-v2.14
  1. 03Pass
 Pass
10 Oct 22:24 tf-a-builder 2575475 not recorded master built integration
  1. 01Pass
 Pass
10 Oct 11:18 tf-a-builder 2574745 54926/6 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/6
  1. 02Pass
 Pass
10 Oct 01:25 tf-a-lts2.10-builder 283997 not recorded lts-v2.10
  1. 03Pass
 Pass
10 Oct 00:30 tf-a-lts2.12-builder 340063 not recorded lts-v2.12
  1. 01Pass
 Pass
9 Oct 23:27 tf-a-lts2.14-builder 243597 not recorded lts-v2.14
  1. 02Pass
 Pass
9 Oct 22:21 tf-a-builder 2573490 not recorded master built integration
  1. 01Pass
 Pass
9 Oct 21:42 tf-a-builder 2572777 55255/1 refactor(qti): set up the delay timer from common code integration built refs/changes/55/55255/1
  1. 02Pass
 Pass
9 Oct 14:41 tf-a-builder 2571478 53535/2 test: default to PSA APIs integration built refs/changes/35/53535/2
  1. 03Pass
 Pass
9 Oct 13:54 tf-a-lts2.10-builder 283003 55248/1 feat(fvp): scale SP_MIN max size based on SRAM size lts-v2.10 built refs/changes/48/55248/1
  1. 02Pass
 Pass
9 Oct 13:27 tf-a-builder 2570608 55211/3 fix(build): always define DYN_DISABLE_AUTH integration built refs/changes/11/55211/3
  1. 01Pass
 Pass
9 Oct 12:24 tf-a-lts2.10-builder 282819 55232/1 chore(fvp): bump maximum permitted Trusted SRAM size lts-v2.10 built refs/changes/32/55232/1
  1. 03Pass
 Pass
9 Oct 10:31 tf-a-builder 2569378 55229/1 fix(lfa): avoid ACTIVATE retry code clash integration built refs/changes/29/55229/1
  1. 01Pass
 Pass
9 Oct 10:03 tf-a-builder 2568851 55227/1 refactor(cpus): move C support files into the helpers directory integration built refs/changes/27/55227/1
  1. 03Pass
 Pass
9 Oct 08:10 tf-a-builder 2567640 55227/1 refactor(cpus): move C support files into the helpers directory integration built refs/changes/27/55227/1
  1. 03Pass
 Pass
9 Oct 06:48 tf-a-builder 2566907 not recorded master
  1. 03Pass
 Pass
9 Oct 01:34 tf-a-lts2.10-builder 282029 not recorded lts-v2.10
  1. 02Pass
 Pass
9 Oct 00:22 tf-a-lts2.12-builder 339044 not recorded lts-v2.12
  1. 03Pass
 Pass
8 Oct 23:27 tf-a-lts2.14-builder 242763 not recorded lts-v2.14
  1. 01Pass
 Pass
8 Oct 22:27 tf-a-builder 2565366 not recorded master built integration
  1. 03Pass
 Pass
8 Oct 21:28 tf-a-builder 2564433 not recorded master built integration
  1. 03Pass
 Pass
8 Oct 17:18 tf-a-lts2.10-builder 281129 55220/1 fix(fvp): absorb BUILD_CPUS_WITH_NO_FVP_MODEL and ENABLE_ERRATA_ALL cores lts-v2.10 built refs/changes/20/55220/1
  1. 02Pass
 Pass
8 Oct 08:33 tf-a-lts2.14-builder 241726 55214/2 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/2
  1. 03Pass
 Pass
8 Oct 08:16 tf-a-lts2.14-builder 241305 55214/1 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/1
  1. 02Pass
 Pass
8 Oct 07:11 tf-a-builder 2561976 55188/2 fix(fvp): remove GIC crash reporting integration built refs/changes/88/55188/2
  1. 01Pass
 Pass
8 Oct 06:37 tf-a-builder 2561141 54926/4 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/4
  1. 02Pass
 Pass
8 Oct 01:29 tf-a-lts2.10-builder 280460 not recorded lts-v2.10
  1. 02Pass
 Pass
8 Oct 00:36 tf-a-lts2.12-builder 338734 not recorded lts-v2.12
  1. 02Pass
 Pass
7 Oct 23:27 tf-a-lts2.14-builder 240540 not recorded lts-v2.14
  1. 03Pass
 Pass
7 Oct 22:22 tf-a-builder 2559972 not recorded master built integration
  1. 02Pass
 Pass
7 Oct 15:14 tf-a-builder 2559586 52109/5 refactor(lfa): add fallback support integration built refs/changes/09/52109/5
  1. 03Pass
 Pass
7 Oct 12:44 tf-a-builder 2558747 54137/7 fix(cpufeat): correctly match the group 3 ID registers space integration built refs/changes/37/54137/7
  1. 03Pass
 Pass
7 Oct 12:12 tf-a-builder 2557944 55180/2 refactor(el3-spmc): remove excess overflow checks integration built refs/changes/80/55180/2
  1. 03Pass
 Pass
7 Oct 10:43 tf-a-builder 2557319 55179/1 fix(firme): fix attestation unmap error handling integration built refs/changes/79/55179/1
  1. 01Pass
 Pass
7 Oct 01:33 tf-a-lts2.10-builder 279815 not recorded lts-v2.10
  1. 02Pass
 Pass
7 Oct 00:27 tf-a-lts2.12-builder 337817 not recorded lts-v2.12
  1. 02Pass
 Pass
6 Oct 23:27 tf-a-lts2.14-builder 239794 not recorded lts-v2.14
  1. 01Pass
 Pass
6 Oct 22:50 tf-a-builder 2551201 not recorded master built integration
  1. 03Pass
 Pass
6 Oct 21:07 tf-a-builder 2550280 54926/2 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/2
  1. 02Pass
 Pass
6 Oct 20:58 tf-a-builder 2549899 55088/2 fix(psci): run the arch setup before pwr_domain_on_finish() integration built refs/changes/88/55088/2
  1. 02Pass
 Pass
6 Oct 17:26 tf-a-builder 2548188 not recorded master
  1. 01Pass
 Pass
6 Oct 10:11 tf-a-builder 2547402 54944/2 refactor(cpus): separate helper files from cpu implementations integration built refs/changes/44/54944/2
  1. 02Pass
 Pass
6 Oct 01:38 tf-a-lts2.10-builder 279025 not recorded lts-v2.10
  1. 02Pass
 Pass
6 Oct 00:34 tf-a-lts2.12-builder 337215 not recorded lts-v2.12
  1. 03Pass
 Pass
5 Oct 23:34 tf-a-lts2.14-builder 239047 not recorded lts-v2.14
  1. 01Pass
 Pass

Show the next 50

Fleet health

Health checks, not CI results. They never count towards any rate on this page.

0 of 21 health checks failed in the last 7 days.

All passed

Showing the latest 21 checks.

  1. Health check 3048380, Complete
  2. Health check 3048381, Complete
  3. Health check 3048382, Complete
  4. Health check 3048916, Complete
  5. Health check 3048917, Complete
  6. Health check 3048918, Complete
  7. Health check 3049360, Complete
  8. Health check 3049361, Complete
  9. Health check 3049362, Complete
  10. Health check 3049692, Complete
  11. Health check 3049693, Complete
  12. Health check 3049694, Complete
  13. Health check 3050191, Complete
  14. Health check 3050192, Complete
  15. Health check 3050193, Complete
  16. Health check 3051133, Complete
  17. Health check 3051134, Complete
  18. Health check 3051135, Complete
  19. Health check 3051684, Complete
  20. Health check 3051685, Complete
  21. Health check 3051686, Complete

One tick per health check, oldest to newest. Each opens its job. Passed Failed Cancelled

Incidents

  1. Lab 17 Sep 2026 to 18 Sep 2026

    LAVA logger DNS failures