TF test results
Synced 06:19 UTC, 2 h ago

Data as of 29 Oct 2026, 06:19 UTC

Last LAVA sync
29 Oct 2026, 06:19 UTC
Last Jenkins sync
29 Oct 2026, 06:35 UTC
Last S3 export sync
7 Oct 2026, 09:53 UTC
Open fetch errors
6,509
About the data
  1. Boards
  2. Google ChromeOS
  3. Geralt (MT8188)

Geralt (MT8188)

MT8188, Geralt, Chromebook. mt8188-geralt

Live First seen 8 May 2026, last seen 29 Oct 2026. 3 units live.

Evaluations

268

278 attempts, 0 cancelled

Completion

95.0%

of 278 attempts

Complete out of complete and incomplete attempts. Cancelled attempts are listed, never counted.

Evaluated pass rate

100.0%

of 252 evaluations with a verdict

Final attempts that passed, out of pass and code. Lab 0, cancelled 0 and unclassified 8 are shown, never folded in.

Failed after retries

8 of 268

10 failed first time, 2 passed on retry

Changes with a failed boot on this board

n/a

Not available for this range: change lineage exists for the live window only.

Last 12 months

Evaluations per week, stacked by final outcome. Hatched means the lab, solid means the code.

Job-level history: 27 Oct 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 29 Oct 2026. 1 day without data.
All gaps
  • No data held: 28 Feb 2026 to 28 Feb 2026

History by month

Before the live window we know whether each attempt completed and how retries ended, not why it failed or which change it was. Shaded bands are months with no data held.

Job-level history: 1 Oct 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 29 Oct 2026. 1 day without data.
All gaps
  • No data held: 28 Feb 2026 to 28 Feb 2026

Units

CI attempts per physical unit, retries included. Passing on another unit can help identify a unit fault. Health checks are fleet health.

7 of 10 first-attempt failures were on geralt-01; 1 of them passed on another unit.
geralt-01 99 7 1 0 Complete 28 Oct 22:21
geralt-04 99 2 0 0 Complete 29 Oct 04:22
geralt-03 80 1 1 0 Complete 28 Oct 07:54

Evaluations

One row per builder build on this board, newest first, with every attempt. CI runs only; 50 of 268 shown.

Attempts
12 Oct 11:28 tf-a-builder 2579062 not recorded master built integration
  1. 04Pass
 Pass
12 Oct 09:56 tf-a-builder 2577753 55227/1 refactor(cpus): move C support files into the helpers directory integration built refs/changes/27/55227/1
  1. 04Pass
 Pass
12 Oct 07:35 tf-a-builder 2576970 not recorded master
  1. 04Pass
 Pass
12 Oct 01:20 tf-a-lts2.10-builder 285398 not recorded lts-v2.10
  1. 04Pass
 Pass
12 Oct 00:35 tf-a-lts2.12-builder 341739 not recorded lts-v2.12
  1. 03Pass
 Pass
11 Oct 23:23 tf-a-lts2.14-builder 245045 not recorded lts-v2.14
  1. 04Pass
 Pass
11 Oct 22:29 tf-a-builder 2576424 not recorded master built integration
  1. 04Pass
 Pass
11 Oct 01:16 tf-a-lts2.10-builder 284501 not recorded lts-v2.10
  1. 04Pass
 Pass
11 Oct 00:27 tf-a-lts2.12-builder 340828 not recorded lts-v2.12
  1. 01Pass
 Pass
10 Oct 23:26 tf-a-lts2.14-builder 244348 not recorded lts-v2.14
  1. 03Pass
 Pass
10 Oct 22:23 tf-a-builder 2575460 not recorded master built integration
  1. 03Pass
 Pass
10 Oct 11:19 tf-a-builder 2574776 54926/6 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/6
  1. 03Pass
 Pass
10 Oct 01:25 tf-a-lts2.10-builder 284022 not recorded lts-v2.10
  1. 01Pass
 Pass
10 Oct 00:29 tf-a-lts2.12-builder 340043 not recorded lts-v2.12
  1. 04Pass
 Pass
9 Oct 23:24 tf-a-lts2.14-builder 243465 not recorded lts-v2.14
  1. 01Pass
 Pass
9 Oct 22:28 tf-a-builder 2573719 not recorded master built integration
  1. 01Pass
 Pass
9 Oct 21:35 tf-a-builder 2572502 55255/1 refactor(qti): set up the delay timer from common code integration built refs/changes/55/55255/1
  1. 01Pass
 Pass
9 Oct 14:55 tf-a-builder 2571832 53535/2 test: default to PSA APIs integration built refs/changes/35/53535/2
  1. 03Pass
 Pass
9 Oct 14:15 tf-a-lts2.10-builder 283440 55248/1 feat(fvp): scale SP_MIN max size based on SRAM size lts-v2.10 built refs/changes/48/55248/1
  1. 04Pass
 Pass
9 Oct 13:30 tf-a-builder 2570712 55211/3 fix(build): always define DYN_DISABLE_AUTH integration built refs/changes/11/55211/3
  1. 04Pass
 Pass
9 Oct 12:24 tf-a-lts2.10-builder 282817 55232/1 chore(fvp): bump maximum permitted Trusted SRAM size lts-v2.10 built refs/changes/32/55232/1
  1. 01Pass
 Pass
9 Oct 10:34 tf-a-builder 2569446 55229/1 fix(lfa): avoid ACTIVATE retry code clash integration built refs/changes/29/55229/1
  1. 03Pass
 Pass
9 Oct 09:54 tf-a-builder 2568668 55227/1 refactor(cpus): move C support files into the helpers directory integration built refs/changes/27/55227/1
  1. 01Pass
 Pass
9 Oct 08:13 tf-a-builder 2567673 55227/1 refactor(cpus): move C support files into the helpers directory integration built refs/changes/27/55227/1
  1. 01Pass
 Pass
9 Oct 06:46 tf-a-builder 2566836 not recorded master
  1. 04Pass
 Pass
9 Oct 01:26 tf-a-lts2.10-builder 281819 not recorded lts-v2.10
  1. 03Pass
 Pass
9 Oct 00:38 tf-a-lts2.12-builder 339456 not recorded lts-v2.12
  1. 03Pass
 Pass
8 Oct 23:29 tf-a-lts2.14-builder 242846 not recorded lts-v2.14
  1. 01Pass
 Pass
8 Oct 22:27 tf-a-builder 2565388 not recorded master built integration
  1. 03Pass
 Pass
8 Oct 21:30 tf-a-builder 2564543 not recorded master built integration
  1. 01Pass
 Pass
8 Oct 17:16 tf-a-lts2.10-builder 281087 55220/1 fix(fvp): absorb BUILD_CPUS_WITH_NO_FVP_MODEL and ENABLE_ERRATA_ALL cores lts-v2.10 built refs/changes/20/55220/1
  1. 01Pass
 Pass
8 Oct 08:50 tf-a-lts2.14-builder 242294 55214/2 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/2
  1. 01Pass
 Pass
8 Oct 08:25 tf-a-lts2.14-builder 241604 55214/1 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/1
  1. 04Pass
 Pass
8 Oct 06:52 tf-a-builder 2561441 55188/2 fix(fvp): remove GIC crash reporting integration built refs/changes/88/55188/2
  1. 01Pass
 Pass
8 Oct 06:23 tf-a-builder 2560661 54926/4 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/4
  1. 01Pass
 Pass
8 Oct 01:37 tf-a-lts2.10-builder 280588 not recorded lts-v2.10
  1. 03Pass
 Pass
8 Oct 00:31 tf-a-lts2.12-builder 338547 not recorded lts-v2.12
  1. 04Pass
 Pass
7 Oct 23:29 tf-a-lts2.14-builder 240634 not recorded lts-v2.14
  1. 03Pass
 Pass
7 Oct 22:21 tf-a-builder 2559745 not recorded master built integration
  1. 01Lab
  2. 03Pass
 Passed on retry
7 Oct 15:03 tf-a-builder 2559210 52109/5 refactor(lfa): add fallback support integration built refs/changes/09/52109/5
  1. 01Pass
 Pass
7 Oct 12:48 tf-a-builder 2558837 54137/7 fix(cpufeat): correctly match the group 3 ID registers space integration built refs/changes/37/54137/7
  1. 04Pass
 Pass
7 Oct 12:09 tf-a-builder 2557835 55180/2 refactor(el3-spmc): remove excess overflow checks integration built refs/changes/80/55180/2
  1. 04Pass
 Pass
7 Oct 10:36 tf-a-builder 2557152 55179/1 fix(firme): fix attestation unmap error handling integration built refs/changes/79/55179/1
  1. 04Pass
 Pass
7 Oct 01:27 tf-a-lts2.10-builder 279715 not recorded lts-v2.10
  1. 03Pass
 Pass
7 Oct 00:29 tf-a-lts2.12-builder 337882 not recorded lts-v2.12
  1. 03Pass
 Pass
6 Oct 23:32 tf-a-lts2.14-builder 239979 not recorded lts-v2.14
  1. 01Pass
 Pass
6 Oct 22:23 tf-a-builder 2550571 not recorded master built integration
  1. 03Pass
 Pass
6 Oct 21:01 tf-a-builder 2549969 54926/2 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/2
  1. 04Pass
 Pass
6 Oct 17:04 tf-a-builder 2547796 not recorded master
  1. 04Pass
 Pass
6 Oct 10:11 tf-a-builder 2547400 54944/2 refactor(cpus): separate helper files from cpu implementations integration built refs/changes/44/54944/2
  1. 03Pass
 Pass

Show the next 50

Fleet health

Health checks, not CI results. They never count towards any rate on this page.

0 of 19 health checks failed in the last 7 days.

All passed

Showing the latest 19 checks.

  1. Health check 3048806, Complete
  2. Health check 3048814, Complete
  3. Health check 3049039, Complete
  4. Health check 3049293, Complete
  5. Health check 3049342, Complete
  6. Health check 3049389, Complete
  7. Health check 3049647, Complete
  8. Health check 3049674, Complete
  9. Health check 3049732, Complete
  10. Health check 3049984, Complete
  11. Health check 3049999, Complete
  12. Health check 3050615, Complete
  13. Health check 3050899, Complete
  14. Health check 3050955, Complete
  15. Health check 3051261, Complete
  16. Health check 3051568, Complete
  17. Health check 3051618, Complete
  18. Health check 3051813, Complete
  19. Health check 3052074, Complete

One tick per health check, oldest to newest. Each opens its job. Passed Failed Cancelled

Incidents

  1. Lab 17 Sep 2026 to 18 Sep 2026

    LAVA logger DNS failures