TF test results
Synced 18:18 UTC, 2 h ago

Data as of 1 Nov 2026, 18:18 UTC

Last LAVA sync
1 Nov 2026, 18:18 UTC
Last Jenkins sync
1 Nov 2026, 18:19 UTC
Last S3 export sync
7 Oct 2026, 09:53 UTC
Open fetch errors
6,509
About the data
  1. Boards
  2. Arm
  3. Juno

Juno

, Arm. juno

Live First seen 1 Nov 2025, last seen 1 Nov 2026. 22 units live.

Evaluations

104,728

107,196 attempts, 3,433 cancelled

Completion

96.9%

of 103,763 attempts

Complete out of complete and incomplete attempts. Cancelled attempts are listed, never counted.

Evaluated pass rate

99.9%

of 22,233 evaluations with a verdict

Final attempts that passed, out of pass and code. Lab 129, cancelled 3,429 and unclassified 1,184 are shown, never folded in.

Failed after retries

1,335 of 104,728

1,972 failed first time, 579 passed on retry

Changes with a failed boot on this board

n/a

Not available for this range: change lineage exists for the live window only.

Last 12 months

Evaluations per week, stacked by final outcome. Hatched means the lab, solid means the code.

Job-level history: 1 Nov 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 1 Nov 2026. 1 day without data.
All gaps
  • No data held: 28 Feb 2026 to 28 Feb 2026

History by month

Before the live window we know whether each attempt completed and how retries ended, not why it failed or which change it was. Shaded bands are months with no data held.

Job-level history: 1 Nov 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 1 Nov 2026. 1 day without data.
All gaps
  • No data held: 28 Feb 2026 to 28 Feb 2026

Units

CI attempts per physical unit, retries included. Passing on another unit can help identify a unit fault. Health checks are fleet health.
juno-r0-01 6,239 275 63 12 Complete 10 Jul 09:31
juno-r1-01 6,505 252 106 10 Incomplete 20 Jul 11:04
juno-r2-01 7,813 221 32 3 Canceled 23 Jul 13:01
juno-r2-03 4,635 205 75 8 Incomplete 17 Jun 12:27
juno-r0-02 7,904 195 14 4 Complete 22 Jul 08:52
juno-r0-04 7,234 166 40 5 Incomplete 25 Jul 01:31
juno-r2-02 8,082 146 6 2 Complete 27 Jul 13:47
laa-00149-juno-r1-01 4,650 142 115 7 Complete 1 Nov 01:10
juno-r0-03 7,493 128 19 2 Complete 23 Jul 13:42
juno-r0-05 5,596 111 18 2 Incomplete 17 Jul 08:03
laa-00093-juno 1,795 28 12 1 Complete 22 Jul 02:24
laa-00093-juno-r2-03 4,763 15 4 0 Complete 1 Nov 01:10
laa-00147-juno-r0-01 4,508 14 1 0 Complete 1 Nov 01:20
laa-00093-juno-r2 113 13 10 0 Complete 15 Jun 02:18
laa-00164-juno-r2-02 4,334 12 2 0 Complete 1 Nov 01:30
laa-00090-juno-r0-04 3,957 11 0 0 Complete 1 Nov 01:06
laa-00141-juno-r2-01 4,608 11 3 0 Complete 1 Nov 13:45
laa-00134-juno-r0-05 4,279 10 1 0 Complete 1 Nov 01:12
laa-00131-juno-r0-03 4,161 7 0 0 Complete 1 Nov 01:17
laa-00102-juno-r0-02 4,517 6 1 0 Complete 1 Nov 01:32
laa-00147-juno 570 3 0 0 Complete 21 Jul 12:10
laa-00149-juno 7 1 1 0 Complete 21 Jul 07:52

Evaluations

One row per builder build on this board, newest first, with every attempt. CI runs only; 50 of 3,949 shown.

Unit: laa-00090-juno-r0-04
Attempts
10 Oct 22:45 tf-a-builder 2575674 not recorded master built integration
  1. 04Pass
 Pass
10 Oct 22:37 tf-a-builder 2575555 not recorded master built integration
  1. 04Pass
 Pass
10 Oct 22:31 tf-a-builder 2575367 not recorded master built integration
  1. 04Pass
 Pass
10 Oct 22:23 tf-a-builder 2575228 not recorded master built integration
  1. 04Pass
 Pass
10 Oct 11:37 tf-a-builder 2574931 54926/6 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/6
  1. 04Pass
 Pass
10 Oct 11:31 tf-a-builder 2574833 54926/6 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/6
  1. 04Pass
 Pass
10 Oct 11:25 tf-a-builder 2574657 54926/6 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/6
  1. 04Pass
 Pass
10 Oct 11:17 tf-a-builder 2574432 54926/6 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/6
  1. 04Pass
 Pass
10 Oct 02:47 tf-a-lts2.8-builder 224425 not recorded lts-v2.8
  1. 04Pass
 Pass
10 Oct 02:39 tf-a-lts2.8-builder 224346 not recorded lts-v2.8
  1. 04Pass
 Pass
10 Oct 02:33 tf-a-lts2.8-builder 224307 not recorded lts-v2.8
  1. 04Pass
 Pass
10 Oct 02:27 tf-a-lts2.8-builder 224122 not recorded lts-v2.8
  1. 04Pass
 Pass
10 Oct 01:45 tf-a-lts2.10-builder 284107 not recorded lts-v2.10
  1. 04Pass
 Pass
10 Oct 01:39 tf-a-lts2.10-builder 284103 not recorded lts-v2.10
  1. 04Pass
 Pass
10 Oct 01:35 tf-a-lts2.10-builder 283897 not recorded lts-v2.10
  1. 04Pass
 Pass
10 Oct 01:27 tf-a-lts2.10-builder 283763 not recorded lts-v2.10
  1. 04Pass
 Pass
10 Oct 00:45 tf-a-lts2.12-builder 340202 not recorded lts-v2.12
  1. 04Pass
 Pass
10 Oct 00:38 tf-a-lts2.12-builder 340031 not recorded lts-v2.12
  1. 04Pass
 Pass
10 Oct 00:30 tf-a-lts2.12-builder 339857 not recorded lts-v2.12
  1. 04Pass
 Pass
9 Oct 23:39 tf-a-lts2.14-builder 243728 not recorded lts-v2.14
  1. 04Pass
 Pass
9 Oct 23:33 tf-a-lts2.14-builder 243527 not recorded lts-v2.14
  1. 04Pass
 Pass
9 Oct 23:27 tf-a-lts2.14-builder 243356 not recorded lts-v2.14
  1. 04Pass
 Pass
9 Oct 23:00 tf-a-builder 2573829 not recorded master built integration
  1. 04Pass
 Pass
9 Oct 22:53 tf-a-builder 2573755 not recorded master built integration
  1. 04Pass
 Pass
9 Oct 22:37 tf-a-builder 2573684 not recorded master built integration
  1. 04Pass
 Pass
9 Oct 22:31 tf-a-builder 2573534 not recorded master built integration
  1. 04Pass
 Pass
9 Oct 22:25 tf-a-builder 2573352 not recorded master built integration
  1. 04Pass
 Pass
9 Oct 22:19 tf-a-builder 2573171 not recorded master built integration
  1. 04Pass
 Pass
9 Oct 21:56 tf-a-builder 2572873 55255/1 refactor(qti): set up the delay timer from common code integration built refs/changes/55/55255/1
  1. 04Pass
 Pass
9 Oct 21:50 tf-a-builder 2572747 55255/1 refactor(qti): set up the delay timer from common code integration built refs/changes/55/55255/1
  1. 04Pass
 Pass
9 Oct 21:44 tf-a-builder 2572602 55255/1 refactor(qti): set up the delay timer from common code integration built refs/changes/55/55255/1
  1. 04Pass
 Pass
9 Oct 14:59 tf-a-builder 2571805 53535/2 test: default to PSA APIs integration built refs/changes/35/53535/2
  1. 04Pass
 Pass
9 Oct 14:46 tf-a-builder 2571452 53535/2 test: default to PSA APIs integration built refs/changes/35/53535/2
  1. 04Pass
 Pass
9 Oct 14:27 tf-a-lts2.10-builder 283467 55248/1 feat(fvp): scale SP_MIN max size based on SRAM size lts-v2.10 built refs/changes/48/55248/1
  1. 04Pass
 Pass
9 Oct 14:21 tf-a-lts2.10-builder 283365 55248/1 feat(fvp): scale SP_MIN max size based on SRAM size lts-v2.10 built refs/changes/48/55248/1
  1. 04Pass
 Pass
9 Oct 14:13 tf-a-lts2.10-builder 283214 55248/1 feat(fvp): scale SP_MIN max size based on SRAM size lts-v2.10 built refs/changes/48/55248/1
  1. 04Pass
 Pass
9 Oct 14:08 tf-a-lts2.10-builder 282992 55248/1 feat(fvp): scale SP_MIN max size based on SRAM size lts-v2.10 built refs/changes/48/55248/1
  1. 04Pass
 Pass
9 Oct 14:03 tf-a-builder 2570747 55211/3 fix(build): always define DYN_DISABLE_AUTH integration built refs/changes/11/55211/3
  1. 04Pass
 Pass
9 Oct 13:56 tf-a-builder 2570661 55211/3 fix(build): always define DYN_DISABLE_AUTH integration built refs/changes/11/55211/3
  1. 04Pass
 Pass
9 Oct 13:50 tf-a-builder 2570563 55211/3 fix(build): always define DYN_DISABLE_AUTH integration built refs/changes/11/55211/3
  1. 04Pass
 Pass
9 Oct 13:44 tf-a-builder 2570489 55211/3 fix(build): always define DYN_DISABLE_AUTH integration built refs/changes/11/55211/3
  1. 04Pass
 Pass
9 Oct 13:37 tf-a-lts2.8-builder 223923 55233/1 feat(fvp): scale SP_MIN max size based on SRAM size lts-v2.8 built refs/changes/33/55233/1
  1. 04Pass
 Pass
9 Oct 13:29 tf-a-lts2.8-builder 223809 55233/1 feat(fvp): scale SP_MIN max size based on SRAM size lts-v2.8 built refs/changes/33/55233/1
  1. 04Pass
 Pass
9 Oct 13:22 tf-a-lts2.8-builder 223740 55233/1 feat(fvp): scale SP_MIN max size based on SRAM size lts-v2.8 built refs/changes/33/55233/1
  1. 04Pass
 Pass
9 Oct 13:18 tf-a-lts2.8-builder 223625 55233/1 feat(fvp): scale SP_MIN max size based on SRAM size lts-v2.8 built refs/changes/33/55233/1
  1. 04Pass
 Pass
9 Oct 13:10 tf-a-lts2.8-builder 223515 55233/1 feat(fvp): scale SP_MIN max size based on SRAM size lts-v2.8 built refs/changes/33/55233/1
  1. 04Pass
 Pass
9 Oct 12:43 tf-a-lts2.10-builder 282780 55232/1 chore(fvp): bump maximum permitted Trusted SRAM size lts-v2.10 built refs/changes/32/55232/1
  1. 04Pass
 Pass
9 Oct 12:35 tf-a-lts2.10-builder 282650 55232/1 chore(fvp): bump maximum permitted Trusted SRAM size lts-v2.10 built refs/changes/32/55232/1
  1. 04Pass
 Pass
9 Oct 12:29 tf-a-lts2.10-builder 282451 55232/1 chore(fvp): bump maximum permitted Trusted SRAM size lts-v2.10 built refs/changes/32/55232/1
  1. 04Pass
 Pass
9 Oct 12:21 tf-a-lts2.8-builder 223371 55231/1 chore(fvp): bump maximum permitted Trusted SRAM size lts-v2.8 built refs/changes/31/55231/1
  1. 04Pass
 Pass

Show the next 50

Fleet health

Health checks, not CI results. They never count towards any rate on this page.

31 of 93 health checks failed in the last 7 days.

31 failed in 7 days, latest passed

Showing the latest 93 checks.

  1. Health check 3049836, Complete
  2. Health check 3049838, Complete
  3. Health check 3049837, Complete
  4. Health check 3050062, Complete
  5. Health check 3050063, Complete
  6. Health check 3050064, Complete
  7. Health check 3050197, Complete
  8. Health check 3050206, Complete
  9. Health check 3050751, Complete
  10. Health check 3050752, Complete
  11. Health check 3050753, Complete
  12. Health check 3050754, Complete
  13. Health check 3051005, Complete
  14. Health check 3051008, Complete
  15. Health check 3051050, Complete
  16. Health check 3051136, Complete
  17. Health check 3051142, Complete
  18. Health check 3051360, Incomplete
  19. Health check 3051369, Incomplete
  20. Health check 3051377, Incomplete
  21. Health check 3051371, Incomplete
  22. Health check 3051386, Incomplete
  23. Health check 3051388, Incomplete
  24. Health check 3051389, Incomplete
  25. Health check 3051392, Incomplete
  26. Health check 3051391, Incomplete
  27. Health check 3051393, Incomplete
  28. Health check 3051394, Incomplete
  29. Health check 3051395, Incomplete
  30. Health check 3051401, Incomplete
  31. Health check 3051407, Incomplete
  32. Health check 3051406, Incomplete
  33. Health check 3051409, Incomplete
  34. Health check 3051415, Incomplete
  35. Health check 3051417, Incomplete
  36. Health check 3051416, Incomplete
  37. Health check 3051431, Incomplete
  38. Health check 3051439, Incomplete
  39. Health check 3051450, Incomplete
  40. Health check 3051451, Incomplete
  41. Health check 3051449, Incomplete
  42. Health check 3051454, Incomplete
  43. Health check 3051452, Incomplete
  44. Health check 3051453, Incomplete
  45. Health check 3051455, Incomplete
  46. Health check 3051456, Incomplete
  47. Health check 3051458, Incomplete
  48. Health check 3051459, Incomplete
  49. Health check 3051457, Complete
  50. Health check 3051460, Complete
  51. Health check 3051461, Complete
  52. Health check 3051463, Complete
  53. Health check 3051462, Complete
  54. Health check 3051464, Complete
  55. Health check 3051475, Complete
  56. Health check 3051474, Complete
  57. Health check 3051696, Complete
  58. Health check 3051970, Complete
  59. Health check 3051971, Complete
  60. Health check 3051972, Complete
  61. Health check 3051973, Complete
  62. Health check 3051974, Complete
  63. Health check 3051975, Complete
  64. Health check 3051980, Complete
  65. Health check 3051981, Complete
  66. Health check 3052317, Complete
  67. Health check 3052720, Complete
  68. Health check 3052723, Complete
  69. Health check 3052721, Complete
  70. Health check 3052722, Complete
  71. Health check 3052729, Complete
  72. Health check 3052730, Complete
  73. Health check 3052736, Complete
  74. Health check 3052738, Complete
  75. Health check 3053203, Complete
  76. Health check 3053721, Complete
  77. Health check 3053725, Complete
  78. Health check 3053723, Complete
  79. Health check 3053724, Complete
  80. Health check 3053729, Complete
  81. Health check 3053730, Complete
  82. Health check 3053733, Complete
  83. Health check 3053748, Complete
  84. Health check 3053847, Complete
  85. Health check 3054035, Complete
  86. Health check 3054038, Complete
  87. Health check 3054036, Complete
  88. Health check 3054037, Complete
  89. Health check 3054044, Complete
  90. Health check 3054046, Complete
  91. Health check 3054057, Complete
  92. Health check 3054059, Complete
  93. Health check 3054193, Complete

One tick per health check, oldest to newest. Each opens its job. Passed Failed Cancelled

Incidents

  1. Lab 1 Feb 2026 to 28 Feb 2026

    not recorded

  2. Lab 17 Sep 2026 to 18 Sep 2026

    LAVA logger DNS failures