TF test results
Synced 12:17 UTC, 3 h ago

Data as of 1 Nov 2026, 12:17 UTC

Last LAVA sync
1 Nov 2026, 12:17 UTC
Last Jenkins sync
1 Nov 2026, 12:18 UTC
Last S3 export sync
7 Oct 2026, 09:53 UTC
Open fetch errors
6,509
About the data
  1. Boards
  2. Arm
  3. Juno

Juno

, Arm. juno

Live First seen 1 Nov 2025, last seen 1 Nov 2026. 9 units live.

Evaluations

11,496

11,589 attempts, 114 cancelled

Completion

98.7%

of 11,475 attempts

Complete out of complete and incomplete attempts. Cancelled attempts are listed, never counted.

Evaluated pass rate

99.9%

of 11,321 evaluations with a verdict

Final attempts that passed, out of pass and code. Lab 1, cancelled 114 and unclassified 60 are shown, never folded in.

Failed after retries

64 of 11,496

93 failed first time, 21 passed on retry

Changes with a failed boot on this board

0 of 104

Allow-CI+2 for TF-A; linked TF-M runs. 2 with no boot verdict. Linked to a change: 40.5% of 11,496 evaluations

Last 30 days

Evaluations per day, stacked by final outcome. Hatched means the lab, solid means the code.

Test-case detail: 3 Oct 2026 to 1 Nov 2026. 0 days without data.

History by month

Before the live window we know whether each attempt completed and how retries ended, not why it failed or which change it was. Shaded bands are months with no data held.

Job-level history: 1 Nov 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 1 Nov 2026. 1 day without data.
All gaps
  • No data held: 28 Feb 2026 to 28 Feb 2026

Units

CI attempts per physical unit, retries included. Passing on another unit can help identify a unit fault. Health checks are fleet health.
laa-00149-juno-r1-01 1,307 22 13 1 Complete 1 Nov 01:10
laa-00093-juno-r2-03 1,349 12 2 0 Complete 1 Nov 01:10
laa-00147-juno-r0-01 1,264 12 1 0 Complete 1 Nov 01:20
laa-00090-juno-r0-04 1,182 10 0 0 Complete 1 Nov 01:06
laa-00164-juno-r2-02 1,347 10 1 0 Complete 1 Nov 01:30
laa-00134-juno-r0-05 1,172 9 1 0 Complete 1 Nov 01:12
laa-00141-juno-r2-01 1,376 7 1 0 Complete 31 Oct 13:45
laa-00131-juno-r0-03 1,203 6 0 0 Complete 1 Nov 01:17
laa-00102-juno-r0-02 1,275 5 1 0 Complete 1 Nov 01:32

Evaluations

One row per builder build on this board, newest first, with every attempt. CI runs only; 50 of 1,203 shown.

Unit: laa-00131-juno-r0-03
Attempts
9 Oct 00:51 tf-a-lts2.12-builder 339499 not recorded lts-v2.12
  1. 03Pass
 Pass
9 Oct 00:45 tf-a-lts2.12-builder 339398 not recorded lts-v2.12
  1. 03Pass
 Pass
9 Oct 00:40 tf-a-lts2.12-builder 339317 not recorded lts-v2.12
  1. 03Pass
 Pass
9 Oct 00:29 tf-a-lts2.12-builder 339068 not recorded lts-v2.12
  1. 03Pass
 Pass
8 Oct 23:50 tf-a-lts2.14-builder 242947 not recorded lts-v2.14
  1. 03Pass
 Pass
8 Oct 23:36 tf-a-lts2.14-builder 242810 not recorded lts-v2.14
  1. 03Pass
 Pass
8 Oct 23:30 tf-a-lts2.14-builder 242573 not recorded lts-v2.14
  1. 03Pass
 Pass
8 Oct 23:24 tf-a-lts2.14-builder 242411 not recorded lts-v2.14
  1. 03Pass
 Pass
8 Oct 22:40 tf-a-builder 2565367 not recorded master built integration
  1. 03Pass
 Pass
8 Oct 22:35 tf-a-builder 2565279 not recorded master built integration
  1. 03Pass
 Pass
8 Oct 22:30 tf-a-builder 2565098 not recorded master built integration
  1. 03Pass
 Pass
8 Oct 22:23 tf-a-builder 2564962 not recorded master built integration
  1. 03Pass
 Pass
8 Oct 21:49 tf-a-builder 2564596 not recorded master built integration
  1. 03Pass
 Pass
8 Oct 21:43 tf-a-builder 2564557 not recorded master built integration
  1. 03Pass
 Pass
8 Oct 21:37 tf-a-builder 2564427 not recorded master built integration
  1. 03Pass
 Pass
8 Oct 21:32 tf-a-builder 2564265 not recorded master built integration
  1. 03Pass
 Pass
8 Oct 17:35 tf-a-lts2.10-builder 281331 55220/1 fix(fvp): absorb BUILD_CPUS_WITH_NO_FVP_MODEL and ENABLE_ERRATA_ALL cores lts-v2.10 built refs/changes/20/55220/1
  1. 03Pass
 Pass
8 Oct 17:29 tf-a-lts2.10-builder 281254 55220/1 fix(fvp): absorb BUILD_CPUS_WITH_NO_FVP_MODEL and ENABLE_ERRATA_ALL cores lts-v2.10 built refs/changes/20/55220/1
  1. 03Pass
 Pass
8 Oct 17:21 tf-a-lts2.10-builder 280974 55220/1 fix(fvp): absorb BUILD_CPUS_WITH_NO_FVP_MODEL and ENABLE_ERRATA_ALL cores lts-v2.10 built refs/changes/20/55220/1
  1. 03Pass
 Pass
8 Oct 09:01 tf-a-lts2.14-builder 242247 55214/2 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/2
  1. 03Pass
 Pass
8 Oct 08:55 tf-a-lts2.14-builder 242145 55214/2 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/2
  1. 03Pass
 Pass
8 Oct 08:49 tf-a-lts2.14-builder 241973 55214/2 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/2
  1. 03Pass
 Pass
8 Oct 08:40 tf-a-lts2.14-builder 241598 55214/1 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/1
  1. 03Pass
 Pass
8 Oct 08:33 tf-a-lts2.14-builder 241482 55214/1 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/1
  1. 03Pass
 Pass
8 Oct 08:28 tf-a-lts2.14-builder 241472 55214/1 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/1
  1. 03Pass
 Pass
8 Oct 08:23 tf-a-lts2.14-builder 241350 55214/1 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/1
  1. 03Pass
 Pass
8 Oct 08:18 tf-a-lts2.14-builder 241159 55214/1 refactor(cpus): rename Canyon to C2-Ultra lts-v2.14 built refs/changes/14/55214/1
  1. 03Pass
 Pass
8 Oct 07:22 tf-a-builder 2561995 55188/2 fix(fvp): remove GIC crash reporting integration built refs/changes/88/55188/2
  1. 03Pass
 Pass
8 Oct 07:16 tf-a-builder 2561920 55188/2 fix(fvp): remove GIC crash reporting integration built refs/changes/88/55188/2
  1. 03Pass
 Pass
8 Oct 07:10 tf-a-builder 2561764 55188/2 fix(fvp): remove GIC crash reporting integration built refs/changes/88/55188/2
  1. 03Pass
 Pass
8 Oct 07:03 tf-a-builder 2561628 55188/2 fix(fvp): remove GIC crash reporting integration built refs/changes/88/55188/2
  1. 03Pass
 Pass
8 Oct 06:57 tf-a-builder 2561416 55188/2 fix(fvp): remove GIC crash reporting integration built refs/changes/88/55188/2
  1. 03Pass
 Pass
8 Oct 06:51 tf-a-builder 2561249 54926/4 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/4
  1. 03Pass
 Pass
8 Oct 06:46 tf-a-builder 2561161 54926/4 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/4
  1. 03Pass
 Pass
8 Oct 06:42 tf-a-builder 2561047 54926/4 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/4
  1. 03Pass
 Pass
8 Oct 06:37 tf-a-builder 2560834 54926/4 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/4
  1. 03Pass
 Pass
8 Oct 06:29 tf-a-builder 2560642 54926/4 fix(psci): allow OS-initiated mode while other cores are off integration built refs/changes/26/54926/4
  1. 03Pass
 Pass
8 Oct 02:47 tf-a-lts2.8-builder 220116 not recorded lts-v2.8
  1. 03Pass
 Pass
8 Oct 02:41 tf-a-lts2.8-builder 219997 not recorded lts-v2.8
  1. 03Pass
 Pass
8 Oct 02:33 tf-a-lts2.8-builder 219825 not recorded lts-v2.8
  1. 03Pass
 Pass
8 Oct 02:26 tf-a-lts2.8-builder 219775 not recorded lts-v2.8
  1. 03Pass
 Pass
8 Oct 01:51 tf-a-lts2.10-builder 280622 not recorded lts-v2.10
  1. 03Pass
 Pass
8 Oct 01:45 tf-a-lts2.10-builder 280530 not recorded lts-v2.10
  1. 03Pass
 Pass
8 Oct 01:37 tf-a-lts2.10-builder 280474 not recorded lts-v2.10
  1. 03Pass
 Pass
8 Oct 00:49 tf-a-lts2.14-builder 240916 not recorded lts-v2.14
  1. 03Pass
 Pass
8 Oct 00:44 tf-a-lts2.12-builder 338703 not recorded lts-v2.12
  1. 03Pass
 Pass
8 Oct 00:38 tf-a-lts2.12-builder 338481 not recorded lts-v2.12
  1. 03Pass
 Pass
8 Oct 00:32 tf-a-lts2.12-builder 338380 not recorded lts-v2.12
  1. 03Pass
 Pass
8 Oct 00:25 tf-a-lts2.12-builder 338247 not recorded lts-v2.12
  1. 03Pass
 Pass
8 Oct 00:10 tf-a-lts2.14-builder 240756 not recorded lts-v2.14
  1. 03Pass
 Pass

Show the next 50

Fleet health

Health checks, not CI results. They never count towards any rate on this page.

31 of 92 health checks failed in the last 7 days.

31 failed in 7 days, latest passed

Showing the latest 92 checks.

  1. Health check 3049836, Complete
  2. Health check 3049838, Complete
  3. Health check 3049837, Complete
  4. Health check 3050062, Complete
  5. Health check 3050063, Complete
  6. Health check 3050064, Complete
  7. Health check 3050197, Complete
  8. Health check 3050206, Complete
  9. Health check 3050751, Complete
  10. Health check 3050752, Complete
  11. Health check 3050753, Complete
  12. Health check 3050754, Complete
  13. Health check 3051005, Complete
  14. Health check 3051008, Complete
  15. Health check 3051050, Complete
  16. Health check 3051136, Complete
  17. Health check 3051142, Complete
  18. Health check 3051360, Incomplete
  19. Health check 3051369, Incomplete
  20. Health check 3051377, Incomplete
  21. Health check 3051371, Incomplete
  22. Health check 3051386, Incomplete
  23. Health check 3051388, Incomplete
  24. Health check 3051389, Incomplete
  25. Health check 3051392, Incomplete
  26. Health check 3051391, Incomplete
  27. Health check 3051393, Incomplete
  28. Health check 3051394, Incomplete
  29. Health check 3051395, Incomplete
  30. Health check 3051401, Incomplete
  31. Health check 3051407, Incomplete
  32. Health check 3051406, Incomplete
  33. Health check 3051409, Incomplete
  34. Health check 3051415, Incomplete
  35. Health check 3051417, Incomplete
  36. Health check 3051416, Incomplete
  37. Health check 3051431, Incomplete
  38. Health check 3051439, Incomplete
  39. Health check 3051450, Incomplete
  40. Health check 3051451, Incomplete
  41. Health check 3051449, Incomplete
  42. Health check 3051454, Incomplete
  43. Health check 3051452, Incomplete
  44. Health check 3051453, Incomplete
  45. Health check 3051455, Incomplete
  46. Health check 3051456, Incomplete
  47. Health check 3051458, Incomplete
  48. Health check 3051459, Incomplete
  49. Health check 3051457, Complete
  50. Health check 3051460, Complete
  51. Health check 3051461, Complete
  52. Health check 3051463, Complete
  53. Health check 3051462, Complete
  54. Health check 3051464, Complete
  55. Health check 3051475, Complete
  56. Health check 3051474, Complete
  57. Health check 3051696, Complete
  58. Health check 3051970, Complete
  59. Health check 3051971, Complete
  60. Health check 3051972, Complete
  61. Health check 3051973, Complete
  62. Health check 3051974, Complete
  63. Health check 3051975, Complete
  64. Health check 3051980, Complete
  65. Health check 3051981, Complete
  66. Health check 3052317, Complete
  67. Health check 3052720, Complete
  68. Health check 3052723, Complete
  69. Health check 3052721, Complete
  70. Health check 3052722, Complete
  71. Health check 3052729, Complete
  72. Health check 3052730, Complete
  73. Health check 3052736, Complete
  74. Health check 3052738, Complete
  75. Health check 3053203, Complete
  76. Health check 3053721, Complete
  77. Health check 3053725, Complete
  78. Health check 3053723, Complete
  79. Health check 3053724, Complete
  80. Health check 3053729, Complete
  81. Health check 3053730, Complete
  82. Health check 3053733, Complete
  83. Health check 3053748, Complete
  84. Health check 3053847, Complete
  85. Health check 3054035, Complete
  86. Health check 3054038, Complete
  87. Health check 3054036, Complete
  88. Health check 3054037, Complete
  89. Health check 3054044, Complete
  90. Health check 3054046, Complete
  91. Health check 3054057, Complete
  92. Health check 3054059, Complete

One tick per health check, oldest to newest. Each opens its job. Passed Failed Cancelled

Incidents

  1. Lab 1 Feb 2026 to 28 Feb 2026

    not recorded

  2. Lab 17 Sep 2026 to 18 Sep 2026

    LAVA logger DNS failures